MMFT1N10 Motorola, MMFT1N10 Datasheet - Page 7

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MMFT1N10

Manufacturer Part Number
MMFT1N10
Description
MEDIUM POWER TMOS FET 1 AMP 100 VOLTS
Manufacturer
Motorola
Datasheet

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design. The footprint for the semiconductor packages must be
the correct size to insure proper solder connection interface
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined by
T J(max) , the maximum rated junction temperature of the die,
R JA , the thermal resistance from the device junction to
ambient, and the operating temperature, T A . Using the values
provided on the data sheet for the SOT–223 package, P D can
be calculated as follows:
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T A of 25 C, one can
calculate the power dissipation of the device which in this case
is 800 milliwatts.
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 800 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–223 package. One is to increase the area of the
drain pad. By increasing the area of the drain pad, the power
Motorola TMOS Power MOSFET Transistor Device Data
Surface mount board layout is a critical portion of the total
The power dissipation of the SOT–223 is a function of the
The values for the equation are found in the maximum
The 156 C/W for the SOT–223 package assumes the use
INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
P D =
P D =
150 C – 25 C
156 C/W
T J(max) – T A
R JA
= 800 milliwatts
0.079
2.0
SOT–223 POWER DISSIPATION
0.079
2.0
0.059
1.5
0.091
2.3
SOT–223
0.059
0.15
1.5
3.8
0.091
2.3
between the board and the package. With the correct pad
geometry, the packages will self align when subjected to a
solder reflow process.
dissipation can be increased. Although one can almost double
the power dissipation with this method, one will be giving up
area on the printed circuit board which can defeat the purpose
of using surface mount technology. A graph of R JA versus
drain pad area is shown in Figure 17.
an aluminum core board such as Thermal Clad . Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
Another alternative would be to use a ceramic substrate or
0.059
1.5
160
140
120
100
80
0.0
Figure 17. Thermal Resistance versus Drain Pad
*Mounted on the DPAK footprint
Board Material = 0.0625
G–10/FR–4, 2 oz Copper
Area for the SOT–223 Package (Typical)
0.248
6.3
inches
mm
0.2
0.8 Watts
A, Area (square inches)
1.25 Watts*
0.4
0.6
MMFT1N10E
T A = 25 C
0.8
1.5 Watts
7
1.0

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