USB2503-HZH Standard Microsystems Corp., USB2503-HZH Datasheet - Page 24
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USB2503-HZH
Manufacturer Part Number
USB2503-HZH
Description
Interface, Integrated USB2.0 Compatible 3-Port Hub
Manufacturer
Standard Microsystems Corp.
Datasheet
1.USB2503-HZH.pdf
(41 pages)
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Revision 1.3 (08-24-04)
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
Field:
Bits:
Start
1
Invalid Protocol Response Behavior
Registers that are accessed with an invalid protocol are not updated. A register is only updated
following a valid protocol. The only valid protocols are Write Byte and Read Byte, which are described
above.
The Hub only responds to the hardware selected Slave Address.
Attempting to communicate with the Hub over SMBus with an invalid slave address or invalid protocol
results in no response, and the SMBus Slave Interface returns to the idle state.
The only valid registers that are accessible by the SMBus slave address are the registers defined in
the Registers Section. See
General Call Address Response
The Hub does not respond to a general call address of 0000_000b.
Slave Device Time-Out
According to the SMBus Specification, V1.0 devices in a transfer can abort the transfer in progress
and release the bus when any single clock low interval exceeds 25ms (T
have detected this condition must reset their communication and be able to receive a new START
condition no later than 35ms (T
Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically
Stretching the SCLK Signal
The Hub supports stretching of the SCLK by other devices on the SMBus. The Hub does not stretch
the SCLK.
SMBus Timing
The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing
in the “Timing Diagram” section.
Bus Reset Sequence
The SMBus Slave Interface resets and returns to the idle state upon a START field followed
immediately by a STOP field.
SMBus Alert Response Address
The SMBALERT# signal is not supported by the Hub.
Internal SMBus Memory Register Set
The following table provides the SMBus slave interface register map values.
Slave
Addr
7
resets its communications port after a start or stop condition.
Wr
1
Ack
Table 5.3 SMBus Read Byte Protocol
1
Section 5.3.3
Addr
Reg.
8
TIMEOUT, MAX
Ack
1
for the response to undefined registers.
19
).
Start
1
Slave
Addr
7
Rd
Integrated USB2.0 Compatible 3-Port Hub
1
Ack
1
TIMEOUT, MIN
Reg.
Data
8
Nack
). Devices that
SMSC USB2503
1
Datasheet
Stop
1