LMX3305 National Semiconductor, LMX3305 Datasheet - Page 19

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LMX3305

Manufacturer Part Number
LMX3305
Description
Triple Phase Locked Loop for RF Personal Communications
Manufacturer
National Semiconductor
Datasheet

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2.0 Programming Description
2.5.5 RF_Icpo (RF_R[4]-[3])
These two bits set the charge pump gain of the RF PLL. The user is able to set the charge pump gain during the acquisition phase
of the fastlock mode to 4X, 7X or 9X.
2.5.6 RF_PD_POL (RF_R[2])
This bit sets the polarity of the RF phase detector. It is set to one when RF VCO characteristics are positive. When RF VCO fre-
quency decreases with increasing control voltage, RF_PD_POL should be set to zero.
2.5.7 RF_RST (RF_R[1])
This bit will reset the RF R and N counters when it is set to one. For normal operation, RF_RST should be set to zero.
2.5.8 V2X (RF_R[0])
V2X when set high enables the voltage doubler for the RF charge pump supply.
Charge Pump
100 µA
400 µA
700 µA
900 µA
Gain
(Continued)
RF_R[4]
0
0
1
1
19
RF_R[3]
0
1
0
1
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