74ACT1284 Fairchild Semiconductor, 74ACT1284 Datasheet

74ACT1284

Manufacturer Part Number

74ACT1284

Description

IEEE 1284 Transceiver

Manufacturer

Fairchild Semiconductor

Datasheet

1.74ACT1284.pdf (7 pages)

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74ACT1284SC

74ACT1284MSA

74ACT1284MTC

74ACT1284

IEEE 1284 Transceiver

General Description

The 74ACT1284 contains four non-inverting bidirectional

buffers and three non-inverting buffers with open Drain out-

puts and high drive capability on the B Ports. It is intended

to provide a standard signaling method for a bi-direction

parallel peripheral in an Extended Capabilities Port mode

(ECP).

The HD (active HIGH) input pin enables the B Ports to

switch from open Drain to a high drive totem pole output,

capable of sourcing 14 mA on all seven buffers. The DIR

input determines the direction of data flow on the bidirec-

tional buffers. DIR (active HIGH) enables data flow from

A Ports to B Ports. DIR (active LOW) enables data flow

from B Ports to A Ports.

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

FACT

Order Number

DIR

Pin Names

- A

- B

- A

- B

is a trademark of Fairchild Semiconductor Corporation.

Package Number

High Drive Enable input (Active HIGH)

Direction Control Input

Side A Inputs or Outputs

Side B Inputs or Outputs

Side A Inputs

Side B Outputs

MSA20

MTC20

M20B

Description

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

DS011683

Features

Connection Diagram

TTL-compatible inputs

A Ports have standard 4 mA totem pole outputs

Typical input hysteresis of 0.5V

B Port high drive source/sink capability of 14 mA

Bidirectional non-inverting buffers

Supports IEEE P1284 Level 1 and Level 2 signaling

standards for bidirectional parallel communications

between personal computers and printing peripherals

B Port outputs in High Impedance mode during power

down

Guaranteed 4000V minimum ESD protection

Package Description

June 1996

Revised November 2000

www.fairchildsemi.com

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