74ACT374 ON Semiconductor, 74ACT374 Datasheet - Page 2

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74ACT374

Manufacturer Part Number
74ACT374
Description
OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
Manufacturer
ON Semiconductor
Datasheet

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Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
TRUTH TABLE
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
MAXIMUM RATINGS
Symbol
= LOW-to-HIGH Transition
V
I
V
T
V
OUT
I
OUT
I
CC
stg
CC
IN
IN
D
OE
CP
H
X
L
n
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC V
Storage Temperature
CC
Inputs
CP D
O
CP
or GND Current per Output Pin
Q
X
0
D
Q
0
NOTE:
CP D
O
Q
That this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
1
OE
H
L
L
D
Q
1
MC74AC374, MC74ACT374
Parameter
Outputs
CP D
O
Q
2
Figure 3. Logic Diagram
O
H
Z
L
D
n
Q
2
http://onsemi.com
CP D
O
Q
3
2
D
Q
3
triggered flip−flops with individual D−type inputs and
3−state true outputs. The buffered clock and buffered Output
Enable are common to all flip−flops. The eight flip−flops
will store the state of their individual D inputs that meet the
setup and hold time requirements on the LOW−to−HIGH
Clock (CP) transition. With the Output Enable (OE) LOW,
the contents of the eight flip−flops are available at the
outputs. When the OE is HIGH, the outputs go to the high
impedance state. Operation of the OE input does not affect
the state of the flip−flops.
The MC74AC374/74ACT374 consists of eight edge−
CP D
O
Q
4
D
Q
4
FUNCTIONAL DESCRIPTION
CP D
O
Q
5
D
Q
5
−0.5 to V
−0.5 to V
−0.5 to +7.0
−65 to +150
CP D
O
Value
Q
6
±20
±50
±50
D
CC
CC
Q
6
+0.5
+0.5
CP D
O
Q
7
D
Q
7
Unit
mA
mA
mA
°C
V
V
V

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