NCP5220 ON Semiconductor, NCP5220 Datasheet - Page 12
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NCP5220
Manufacturer Part Number
NCP5220
Description
PWM Dual Buck and Linear Power Controller
Manufacturer
ON Semiconductor
Datasheet
1.NCP5220.pdf
(18 pages)
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10. Standard S3 State.
11. SLP_S3 goes HIGH.
12. 12 V ramps back to regulation.
13. 12 V UVLO = L and SLP_S3 = H. MCH ramps with SS pin, timing is 0.8 * C
14. S0 Mode.
15. S5 Mode −− SLP_S5 = L.
16. DDQ, VTT and MCH Turned OFF.
17. S5 Mode.
5VDUAL
DDQ−S0
5VSTBY
2. 5VSTBY or 5VSTB is the ultimate chip enable, SLP_S5 and SLP_S3 go HIGH. This supply has to be up first to
3. 12 V supply ramp.
4. DDQ will ramp with the tracking of SS pin, timing is 1.2 * C
5. DDQ SS is completed, then SS pin is released from DDQ. SS pin is shorted to ground.
5. MCH ramps with the tracking of SS pin ramp, timing is 0.8 * C
6. MCH SS is completed, then SS pin is released from MCH, SS pin is shorted to ground. S0 Mode.
7. S3 MODE −− SLP_S3 = L.
8. VTT and MCH will be turned off.
9. 12 V ramps to 0 V.
SLP_S5
SLP_S3
SS Pin
ensure gates are in known state.
State
VTT
MCH
12 V
or
1
2
3
4
Figure 17. NCP5220 Power−Up and Power−Down
5
SO
6
http://onsemi.com
7
NCP5220
8
9
12
Frequency
Switching
Doubles
SS
10
S3
/ 4 m (sec).
SS
/ 8 m (sec). VTT start up with current limit.
11
12 13
SS
/ 8 m (sec). VTT rises.
14
SO
15 16
17
S5