NCP3101 ON Semiconductor, NCP3101 Datasheet - Page 6

• Manufacturer Part Number: NCP3101
• Description: Wide Input Voltage Synchronous Buck Converter
• Manufacturer: ON Semiconductor

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General
voltage 6 A synchronous PWM buck converter designed to
operate from a 4.5 V to 13.2 V supply. The output voltage of
the converter can be precisely regulated down to 800 mV
$1.0% when the V
frequency is internally set to 275 kHz. A high gain
Operational Transconductance Error Amplifier (OTA) is
used for feedback and stabilizing the loop.
Duty Cycle and Maximum Pulse Width Limits
at an operating point defined by the ratio of the input to the
output voltage. The NCP3101 can achieve an 80% duty
cycle. There is a built in off-time which ensures that the
bootstrap supply is charged every cycle. The NCP3101,
which is capable of a 100 nsec pulse width (minimum), can
allow a 12 V to 0.8 V conversion at 275 kHz. The duty cycle
limit and the corresponding output voltage are shown below
in graphical format in Figure 9 and 11. The light gray area
represents the safe operating area for the lowest maximum
operational duty cycle and the dark grey area represents the
absolute maximum duty cycle and corresponding output
voltage.
Input Voltage Range (V
13.2 V with reference to GND and PHS, respectively.
Although BST is rated at 13.2 V with reference to PHS, it can
also tolerate 25 V with respect to GND.
NCP3101 is a high efficiency integrated wide input
In steady state DC operation, the duty cycle will stabilize
The input voltage range for both V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.8
Max-Maximum
Min-Maximum
Figure 9. Duty Cycle to Output Voltage
4.5 V
2.8
FB
OUTPUT VOLTAGE (V)
pin is tied to V
CC
4.8
and BST)
13.2 V
CC
6.8
DETAILED OPERATING DESCRIPTION
OUT
and BST is 4.5 V to
. The switching
Minimum
8.8
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10.8
NCP3101
6
External Enable/Disable
below the 400 mV threshold as shown in Figure 11, it
disables the PWM Logic and the gate drive outputs. In this
disabled
amplifier's (EOTA) output source current is reduced and
limited to the Soft-Start mode of 10 mA.
Normal Shutdown Behavior
because the input supply reaches UVLO threshold. In this
case, switching stops, the internal soft-start, SS, is
discharged, and all GATE pins go low. The switch node
enters a high impedance state and the output capacitors
discharge through the load with no ringing on the output
voltage.
When the Comp Pin voltage falls or is pulled externally
Normal shutdown occurs when the IC stops switching
10
11
9
8
7
6
5
4
3
Figure 10. Maximum Input to Output Voltage
4.5
mode,
5.5
Figure 11. Disable Circuit
6.5
D
MAX
COMP/DIS
the
7.5
INPUT VOLTAGE (V)
= 0.8
D
FB
operational
MAX
8.5
17
16
= 0.7
9.5
V
0.8 V
-
+
REF
10.5 11.5 12.5 13.5
transconductance