ICL7129 Intersil, ICL7129 Datasheet - Page 8

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ICL7129

Manufacturer Part Number
ICL7129
Description
41/2 Digit LCD/ Single-Chip A/D Converter
Manufacturer
Intersil
Datasheet

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Display Temperature Compensation
For most applications an adequate display can be obtained by
connecting V
where a wide temperature range is encountered, the voltage
drive levels for some triplexed liquid crystal displays may need
to vary with temperature in order to maintain good display
contrast and viewing angle. The amount of temperature
FIGURE 10. MULTIMETER EXAMPLE SHOWING USE OF
FIGURE 9. TYPICAL BACKPLANE AND ANNUNCIATOR
BP1
BP2
BP3
LOW BATTERY CONTINUITY
DRIVE WAVEFORM
ANNUNCIATOR DRIVE OUTPUT
DlSP
FIGURE 11. TWO METHODS FOR TEMPERATURE COMPENSATING THE LIQUID CRYSTAL DISPLAY
1N4148
(pin 19) to DGND (pin 36). In applications
75K
5K
39K
+
-
VOLTS
AMPS
ICL7611
200K
m
M
K
ANNUNCIATOR
ANNUNCIATOR
19
36
BACKPLANE
BACKPLANE
V
DGND
DISP
ICL7129
ICL7129
24
23
V+
V-
3-38
compensation will depend upon the type of liquid crystal used.
Display manufacturers can supply the temperature compen-
sation requirements for their displays. Figure 11 shows two
circuits that can be adjusted to give a temperature compensa-
tion of
between DGND and V
to assure that no forward current is injected into the chip if
V
Component Selection
There are only three passive components around the
ICL7129 that need special consideration in selection. They
are the reference capacitor, integrator resistor, and integrator
capacitor. There is no auto-zero capacitor like that found in
earlier integrating A/D converter designs.
The integrating resistor is selected to be high enough to
assure good current Iinearity from the buffer amplifier and
integrator and low enough that PC board leakage is not a
problem. A value of 150k should be optimum for most appli-
cations. The integrator capacitor is selected to give an opti-
mum integrator swing at full-scale. A large integrator swing will
reduce the effect of noise sources in the comparator but will
affect rollover error if the swing gets too close to the positive
rail ( 0.7V). This gives an optimum swing of 2.5V at full-
scale. For a 150k
second the value is 0.1 F. For different conversion rates, the
value will change in inverse proportion. A second requirement
for good linearity is that the capacitor have low dielectric
absorption. Polypropylene caps give good performance at a
reasonable price. Finally the foil side of the cap should be
connected to the integrator output to shield against pickup.
The only requirement for the reference cap is that it be low
leakage. In order to reduce the effects of stray capacitance,
a 1 F value is recommended.
Clock Oscillator
The ICL7129 achieves its digital range changing by integrat-
ing the input signal for 1000 clock pulses (2,000 oscillator
cycles) on the 2V scale and 10,000 clock pulses on the
200mV scale. To achieve complete rejection of 60Hz on both
scales, an oscillator frequency of 120kHz is required, giving
two conversions per second.
DISP
is more negative than DGND.
20K
+10mV/
39K
18K
o
integrating resistor and 2 conversions per
C between V+ and V
DISP
2N2222
should have a low turn-on voltage
19
36
V
DGND
DISP
ICL7129
24
23
V+
V-
DISP
. The diode

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