SI5110 Silicon Storage Technology Inc, SI5110 Datasheet - Page 18

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SI5110

Manufacturer Part Number
SI5110
Description
SiPHY OC-48/STM-16 SONET/SDH TRANSCEIVER
Manufacturer
Silicon Storage Technology Inc
Datasheet

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Si 5110
Pin Descriptions: Si5110
18
B2, C2, D1,
Number(s)
G1, H2, J2,
E2, E7–9,
F2, F7–9,
Pin
H6
H7
H5
K1
H8
D2
B3
J5
FIFOERR
FIFORST
LOSLVL
BWSEL
Name
DLBK
LLBK
GND
LOS
GND
I/O
O
O
I
I
I
I
I
Signal Level
Preliminary Rev. 0.41
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Bandwidth Select DSPLL.
This input selects loop bandwidth of the DSPLL.
BWSEL = 0: Loop bandwidth set to 6 kHz.
BWSEL = 1: Loop bandwidth set to 25 kHz.
Diagnostic Loopback.
When this input is active low the transmit clock and
data are looped back for output on RXDOUT, RXCLK1
and RXCLK2. This pin should be held high for normal
operation.
FIFO Error.
This output is driven high when a FIFO over-
flow/underflow has occurred. This output will stick high
until reset by asserting FIFORST.
FIFO RESET.
This input when asserted high resets the read/write
FIFO pointers to their initial state.
Supply Ground.
Line Loopback.
When this input is active low the recovered clock and
data are looped back for output on TXDOUT, and
TXCLKOUT. This pin should be held high for normal
operation.
Loss-of-Signal.
This output is driven low when the peak-to-peak signal
amplitude is below threshold set via LOSLVL.
LOS Threshold Level.
Applying an analog voltage to this pin allows adjust-
ment of the Threshold used to declare LOS. Tieing
this input high disables LOS detection and forces the
LOS output high.
Description

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