IDT70V05 Integrated Device Technology, IDT70V05 Datasheet - Page 2

• Manufacturer Part Number: IDT70V05
• Description: High-speed 3.3v 8k X 8 Dual-port Static Ram
• Manufacturer: Integrated Device Technology

Description
IDT70V05 is designed to be used as a stand-alone 64K-bit Dual-Port
SRAM or as a combination MASTER/SLAVE Dual-Port SRAM for 16-bit-
or-more word systems. Using the IDT MASTER/SLAVE Dual-Port SRAM
approach in 16-bit or wider memory system applications results in full-
speed, error-free operation without the need for additional discrete logic.
address, and I/O pins that permit independent, asynchronous access for
Pin Configurations
NOTES:
1. All V
2. All GND pins must be connected to ground supply.
3. J68-1 package body is approximately .95 in x .95 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate oriention of the actual part-marking
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
INDEX
V
V
V
V
12/03/01
IDT70V05S/L
High-Speed 3.3V 8K x 8 Dual-Port Static RAM
SS
SS
DD
DD
0R
1R
2R
3R
4R
5R
6R
PN64 package body is approximately 14mm x 14mm x 1.4mm.
The IDT70V05 is a high-speed 8K x 8 Dual-Port Static RAM. The
This device provides two independent ports with separate control,
2L
3L
4L
5L
6L
7L
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
pins must be connected to power supply.
27 28 29 30 31 32 33 34 35 36 37 38 39
9 8 7
6
5 4 3
68-Pin PLCC
Top View
IDT70V05J
J68-1
2 1 68 67 66 65
(1,2,3)
(4)
(5)
40 41 42 43
64 63 62 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
INDEX
2941 drw 02
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
V
V
V
V
DD
SS
DD
BUSY
SS
A
A
A
A
A
A
BUSY
0R
1R
2R
3R
4R
5R
INT
M/S
INT
A
A
A
A
A
V
12/03/01
2L
3L
4L
5L
6L
7L
6.42
5L
4L
3L
2L
1L
0L
0R
1R
2R
3R
4R
SS
2
reads or writes to any location in memory. An automatic power down
feature controlled by CE permits the on-chip circuitry of each port to enter
a very low standby power mode.
devices typically operate on only 400mW of power.
and a 64-pin thin quad flatpack (TQFP).
L
R
L
R
10
11
12
13
14
15
16
Fabricated using IDT’s CMOS high-performance technology, these
The IDT70V05 is packaged in a ceramic 68-pin PGA and PLCC
1
2
3
4
5
6
7
8
9
,
Industrial and Commercial Temperature Ranges
64-Pin TQFP
Top View
70V05PF
PN-64
(4)
(5)
48
47
33
46
45
44
43
42
41
40
39
38
37
36
35
34
2941 drw 03
A
A
A
A
A
INT
BUSY
V
M/S
BUSY
INT
A
A
A
A
A
4L
3L
2L
1L
0L
SS
0R
1R
2R
3R
4R
L
R
L
R
,