IDT70V05 Integrated Device Technology, IDT70V05 Datasheet - Page 14

• Manufacturer Part Number: IDT70V05
• Description: High-speed 3.3v 8k X 8 Dual-port Static Ram
• Manufacturer: Integrated Device Technology

Timing Waveform of Write with Port-to-Port Read with BUSY
NOTES:
1. To ensure that the earlier of the two ports wins. t
2. CE
3. OE = V
4. If M/S = V
5. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the port opposite from Port “A”.
DATA
IDT70V05S/L
High-Speed 3.3V 8K x 8 Dual-Port Static RAM
DATA
ADDR
ADDR
BUSY
L
R/W
= CE
OUT "B"
IN "A"
IL
for the reading port.
R
IL
"A"
"A"
"B"
"B"
= V
(SLAVE) then BUSY is input. For this example, BUSY
IL.
t
APS
(1)
APS
is ignored for M/S = V
“A”
t
BAA
= V
IH
IL
and BUSY
(SLAVE).
MATCH
t
6.42
WC
14
“B”
input is shown above.
t
WP
Industrial and Commercial Temperature Ranges
MATCH
t
WDD
t
DW
VALID
t
DDD
(3)
t
(2,4,5)
BDA
t
DH
(M/S=V
2941 drw 12
t
BDD
VALID
IH
)