IDT71024S Integrated Device Technology, IDT71024S Datasheet - Page 5
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IDT71024S
Manufacturer Part Number
IDT71024S
Description
128k X 8 Cmos Static Ram With Corner Power & Ground Pinout
Manufacturer
Integrated Device Technology
Datasheet
1.IDT71024S.pdf
(8 pages)
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Timing Waveform of Read Cycle No. 1
NOTES:
1. WE is HIGH for Read Cycle.
2. Device is continuously selected, CS
3. Address must be valid prior to or coincident with the later of CS
4. OE is LOW.
5. Transition is measured ±200mV from steady state.
Timing Waveform of Read Cycle No. 2
CURRENT
ADDRESS
IDT71024 CMOS Static RAM
1 Meg (128K x 8-Bit)
SUPPLY
DATA
Vcc
DATA
ADDRESS
OUT
OUT
CS
CS
OE
2
1
Icc
I
SB
PREVIOUS DATA
1
is LOW, CS
HIGH IMPEDANCE
t
2
PU
is HIGH.
OUT
t
OH
VALID
1
t
CLZ
transition LOW and CS
t
OLZ
(5)
(5)
t
t
ACS
AA
t
AA
(3)
t
RC
6.42
5
2
transition HIGH; otherwise t
t
OE
(1)
(1,2,4)
t
RC
Commercial and Industrial Temperature Ranges
AA
is the limiting parameter.
DATA
DATA
OUT
t
PD
t
CHZ
VALID
OUT
t
OHZ
(5)
VALID
(5)
t
OH
2964 drw 05
2964 drw 06