UCC1884 Unitrode Semiconductor, UCC1884 Datasheet - Page 5

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UCC1884

Manufacturer Part Number
UCC1884
Description
Frequency Foldback Current Mode PWM Controller
Manufacturer
Unitrode Semiconductor
Datasheet
PIN DESCRIPTIONS (cont.)
VREF: This pin is the output of the 5V regulated refer-
ence. Bypass this pin with a low ESR and ESL ceramic
capacitor (e.g., 0.47 F).
VVS: Provides a programmable duty cycle clamp which
is dependent upon the input voltage. A resistor divider
network reduces the input voltage supplied to VVS. The
APPLICATION INFORMATION
Theory of Operation: The UCC3884 current mode PWM
controller contains a programmable oscillator which in-
cludes the ability to synchronize multiple PWMs. The
positive and negative sloped portions of the oscillator
waveform (measured at CT), have time intervals that are
set by external resistors at ION and IOFF. The operating
frequency is inversely proportional to the timing capacitor.
The negative sloped portion of the oscillator waveform is
extended in time as the measured output voltage de-
creases providing protection during output faults. The
power supply output voltage and the voltage from VREF
are fed back to VOUT. When the output voltage de-
creases, the voltage at VOUT also decreases. As VOUT
decreases below 3.5V, the operating frequency de-
creases. This reduction in frequency allows the duty cycle
to decrease below what the CS to OUT delay would oth-
erwise permit. This is referred to as frequency foldback.
An output short circuit or overload causes the converter
to enter the frequency foldback mode. Synchronization to
other controllers can only occur during normal operation,
that is, when VOUT is greater than 3.0V.
GT is provided to turn off an external depletion-mode
MOSFET after startup when the bootstrap winding ex-
ceeds 10V. This depletion-mode MOSFET is used in the
housekeeping section of the converter to simplify startup
biasing circuitry. The amplifier that drives this MOSFET
has 300mV of hysteresis to avoid oscillation during power
up.
An
clamps the duty cycle. The duty cycle limit is inversely
proportional to input voltage and a resistor divider net-
accurate
programmable
volt-second
technique
5
IC determines the reciprocal of the voltage at VVS and
scales the result. The voltage is then compared to the os-
cillator waveform to clamp the duty cycle. The purpose of
this clamp is to reduce the likelihood of saturating the iso-
lation transformer during unusual line or load conditions.
work is used to program the proportionality constant. At a
given input voltage and constant load, under closed loop
control, the operating duty cycle is a fixed value. The volt-
second clamp duty cycle may then be set somewhat
higher than this operating duty cycle. For other input volt-
ages, the volt-second clamp will still exceed the steady
state operating duty cycle. This allows normal closed loop
operation of the converter. It is during a load transient (a
fault such as a momentary short circuit) as the error am-
plifier increases the duty cycle, that when the volt-second
clamp accurately limits the maximum volt-seconds. This
ensures that the transformer does not saturate during a
fault which can fail the power supply. After the fault is re-
moved the converter resumes closed loop control.
CSS is provided which allows the UCC3884 to be dis-
abled with an external transistor. The increasing pulse
width at OUT during soft start should be programmed to
be less than the pulse width of the duty cycle limit that
the frequency foldback circuitry creates. The frequency
foldback circuit will be in effect during soft start since the
output voltage fed back to VOUT is less than 3.5V. De-
signing the circuit in this fashion allows a proper startup
sequence.
The current sense feedback pin has an overcurrent pro-
tection feature which forces a soft start cycle only if the
IC is not currently in a soft start cycle. A 1V bias at the
PWM comparator’s non-inverting input and a reset domi-
nant PWM latch permit zero duty cycle operation.
The error amplifier has a wide gain-bandwidth product
and its non-inverting input is internally set to 2.5VDC.
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