UCC1580-1 Unitrode Semiconductor, UCC1580-1 Datasheet

UCC1580-1

Manufacturer Part Number

UCC1580-1

Description

Single Ended Active Clamp Reset PWM

Manufacturer

Unitrode Semiconductor

Datasheet

1.UCC1580-1.pdf (8 pages)

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Single Ended Active Clamp/Reset PWM

FEATURES

BLOCK DIAGRAM

6/97

Pin Numbers refer to DIL-16 and SOIC-16 packages

Provides Auxiliary Switch

Activation Complementary

to Main Power Switch Drive

Programmable deadtime

(Turn-on Delay) Between

Activation of Each Switch

Voltage Mode Control with

Feedforward Operation

Programmable Limits for

Both Transformer Volt-

Second Product and PWM

Duty Cycle

High Current Gate Driver for

Both Main and Auxiliary

Outputs

Multiple Protection Features

with Latched Shutdown and

Soft Restart

Low Supply Current (100 A

Startup, 1.5mA Operation)

DESCRIPTION

The UCC3580 family of PWM controllers is designed to implement a variety of

active clamp/reset and synchronous rectifier switching converter topologies.

While containing all the necessary functions for fixed frequency, high perform-

ance pulse width modulation, the additional feature of this design is the inclu-

sion of an auxiliary switch driver which complements the main power switch,

and with a programmable deadtime or delay between each transition. The ac-

tive clamp/reset technique allows operation of single ended converters beyond

50% duty cycle while reducing voltage stresses on the switches, and allows a

greater flux swing for the power transformer. This approach also allows a reduc-

tion in switching losses by recovering energy stored in parasitic elements such

as leakage inductance and switch capacitance.

The oscillator is programmed with two resistors and a capacitor to set switching

frequency and maximum duty cycle. A separate synchronized ramp provides a

voltage feedforward pulse width modulation and a programmed maximum volt-

second limit. The generated clock from the oscillator contains both frequency

and maximum duty cycle information.

The main gate drive output (OUT1) is controlled by the pulse width modulator.

The second output (OUT2) is intended to activate an auxiliary switch during the

off time of the main switch, except that between each transition there is

deadtime where both switches are off, programmed by a single external resis-

tor. This design offers two options for OUT2, normal and inverted. In the -1 and

-2 versions, OUT2 is normal and can be used to drive PMOS FETs. In the -3

UCC1580-1,-2,-3,-4

UCC2580-1,-2,-3,-4

UCC3580-1,-2,-3,-4

continued

UDG-95069-2

Related parts for UCC1580-1

UCC1580-1 Summary of contents

Page 1

... This design offers two options for OUT2, normal and inverted. In the -1 and -2 versions, OUT2 is normal and can be used to drive PMOS FETs. In the -3 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,-4 continued ...

Page 2

... UCC3580, 40°C to 85°C for OUT1 OUT2 TEST CONDITIONS I = 3mA CLK I = 3mA CLK 2 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,-4 55°C to 125°C. The 40°C to 85°C. The MIN TYP MAX UNITS 370 400 430 kHz 650 750 850 ns 4 ...

Page 3

... OUT2 300pF OUT2 100k 15pF OUT1 OUT2 25° 100k 15pF OUT1 OUT2 25° UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,- 0°C to 70°C for the UCC3580, A MIN TYP MAX UNITS 50 100 mV 3.16 3.33 3. 0.1 0.4 0.9 2.44 2.5 2.56 150 400 0.3 ...

Page 4

... A shunt clamp from VDD to GND limits the supply voltage to 15V. The -2 and -4 versions do not start until the shunt clamp threshold is reached and operation continues as long as VDD is greater than 8.5V. 4 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,- 0°C to 70°C for the UCC3580, OUT2 ...

Page 5

... Ca- pacitor CT is alternately charged through R1 and dis- charged through R2 between levels of 1V and 3.5V. The charging and discharging equations for CT are given by V charge C V discharge C Figure 1. Output Time Relationships 5 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,-4 t REF 4 3.5 e UDG-95070-2 ...

Page 6

... CT. The charge time OUT1 and OUT2 on both sets of edges. Figure 1 shows the relationships between the outputs. Figure gives the ratio between the two delays. During the tran- T sition from main to auxiliary switch, the delay is not 6 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,- 1. ...

Page 7

... LINE goes low, OUT1 goes to zero duty cycle, but OUT2 (-3. -4) keeps pulsing at full duty cycle (switching period minus Delay1 and Delay2) in order to discharge the clamp capacitance to zero and prepare for full soft start cycle. Figure 4. Active Clamp Forward Converter 7 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,-4 UDG-95071-2 ...

Page 8

... APPLICATION INFORMATION (cont.) Figure 5. Off-line Active Clamp Flyback Converter Figure 6. UCC3580 Used in a Synchronous Rectifier Application UNITRODE CORPORATION 7 CONTINENTAL BLVD. MERRIMACK, NH 03054 TEL. (603) 424-2410 FAX (603) 424-3460 8 UCC1580-1,-2,-3,-4 UCC2580-1,-2,-3,-4 UCC3580-1,-2,-3,-4 UDG-96017-1 UDG-96018-1 ...

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