UCC1580-1 Unitrode Semiconductor, UCC1580-1 Datasheet - Page 7

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UCC1580-1

Manufacturer Part Number
UCC1580-1
Description
Single Ended Active Clamp Reset PWM
Manufacturer
Unitrode Semiconductor
Datasheet
APPLICATION INFORMATION (cont.)
very critical for ZVS turn-on. For the first half of OUT1
off-time, the body diode of the auxiliary switch conducts
and OUT2 can be turned on any time. The transition
from auxiliary to main switch is more critical. Energy
stored in the parasitic inductance(s) at the end of the
OUT2 pulse is used to discharge the parasitic capaci-
tance across the main switch during the delay time. The
delay (Delay 1) should be optimally programmed at 1/4
the resonant period determined by parasitic capaci-
tance and the resonant inductor (transformer leakage
and/or magnetizing inductances, depending on the to-
pology). However, depending on other circuit parasitics,
the resonant behavior can change, and in some cases,
ZVS turn-on may not be obtainable. It can be shown
that the optimum delay time is independent of operating
conditions for a specific circuit and should be deter-
mined specifically for each circuit.
Output Behavior During Fault Modes
The UCC3580 family is designed to protect power con-
verter components against faults such as input line
Figure 4. Active Clamp Forward Converter
7
dropout and output overcurrent. These fault conditions
are latched and require full soft start recycling. The IC
does not provide cycle-by-cycle current limiting as duty
cycle hiccups can cause instabilities and/or cross con-
duction in active clamp type circuits. Instead the IC has
a smart output sequencing feature to protect against
transients. When the error amplifier output commands
low duty cycle (of OUT1) as a result of a load transient,
the IC senses it and drives both switches (main and
auxiliary) off. As a result, the steady state operating
conditions such as clamp capacitance voltage are not
abruptly changed. In all other cases, normal logic pre-
vails where OUT2 (-3, -4) is a true complement of
OUT1 with delay (dead) times between them. When
LINE goes low, OUT1 goes to zero duty cycle, but
OUT2 (-3. -4) keeps pulsing at full duty cycle (switching
period minus Delay1 and Delay2) in order to discharge
the clamp capacitance to zero and prepare for full soft
start cycle.
UCC1580-1,-2,-3,-4
UCC2580-1,-2,-3,-4
UCC3580-1,-2,-3,-4
UDG-95071-2

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