STA027 ST Microelectronics, STA027 Datasheet - Page 30

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STA027

Manufacturer Part Number
STA027
Description
SBC Codec
Manufacturer
ST Microelectronics
Datasheet

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5 Register description
5.8.3
5.8.4
30/44
Description :
After a soft reset, user must write 0 in CK_CMD to run the core clock of the chip. This will begin
the boot of the chip, and so get it out of its idle state.
DEC_SEL :
Address : 0x55 (85)
Type : RW - DEC
Software Reset : 0
Description :
This register select the encoder/decoder data flux according the mode written in following table
Table 18.
RUN :
Address : 0x56 (86)
Type : RW - DEC
Software Reset : 0
Description :
Note:
b7
b7
When a software reset occurs, register RUN is reset (value 0) by the dsp (see I).
When boot routines are finished, the dsp write inside RUN register the value 2 : this is
the start of the external configuration period (start of DEC : see I).
When the external device wants to end the external configuration period, it must write
the value 1 inside the register RUN: this is the run command that starts the decoding
process (see I).
available modes depends on patch code used
.
Bit(7:0)
b6
b6
10
18
19
21
22
b5
b5
CD00066274
b4
SINE (test mode chip alive)
SBC decoder
ADC/GPSO SBC encoder
SDI/GPSO SBC encoder
ADC/SDO SBC encoder
b4
b3
b3
b2
b2
Mode
b1
b1
STA027
b0
b0

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