SL2610 Zarlink Semiconductor Inc, SL2610 Datasheet

no-image

SL2610

Manufacturer Part Number
SL2610
Description
Wide Dynamic Range Image Reject MOPLL
Manufacturer
Zarlink Semiconductor Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SL2610
Manufacturer:
MAXIM
Quantity:
827
Features
Applications
Single chip mixer/oscillator PLL combination for
multi band tuner for DTT applications
Each mixer oscillator band optimized for wide
dynamic range
RF input stages allow for either single-ended or
differential drive
PLL frequency synthesizer designed for low
phase noise performance
Broadband output level detect with onset adjust
PLL frequency synthesizer compatible with
standard digital terrestrial offsets
Four integrated switching ports
I
ESD protection (Normal ESD handling
procedures should be observed)
Terrestrial digital receiver systems
Terrestrial analogue receiver systems
Cable receiver systems
Data communications systems
2
XTALCAP
PORT P0
PORT P1
PORT P2
PORT P3
CHARGE
C fast mode compliant
PUMP
DRIVE
XTAL
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
~
Interface
Port
Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved.
DIVIDER
REF
Figure 1 - SL2610 Block Diagram
SDA SCL ADD
DIVIDER
PROG
Interface
Zarlink Semiconductor Inc.
I
2
C
Wide Dynamic Range Image Reject MOPLL
1
SELECT
Description
The SL2610 is a mixer oscillator intended primarily
for application in all band tuners, where it performs
image reject downconversion of the RF channel to a
standard 36 MHz or 44 MHz IF.
Each band consists of a low noise preamplifier/mixer
and local oscillator with an external varactor tuned
tank. The band outputs share a common low
impedance SAWF driver stage.
Frequency selection is controlled by the on-board I
bus frequency synthesizer. This block also controls
four general purpose switching ports for selecting the
prefilter/AGC stages.
IF
SL2610/IG/LH1Q 40 Pin MLP Tape & Reel, Bake & Drypack
SL2610/IG/LH1N 40 Pin MLP Trays, Bake & Drypack
SL2610/IG/LH2Q 40 Pin MLP Tape & Reel, Bake & Drypack*
SL2610/IG/LH2N 40 Pin MLP Trays, Bake & Drypack*
BAND
BAND
HI
HI
~
BAND
BAND
LO
LO
~
BAND
BAND
MID
MID
~
Ordering Information
-40°C to +85°C
*Leadfree
Data Sheet
CONVOP
CONVOPB
IFIP
IFIPB
IFOP
IFOPB
AGC BIAS
AGC OUT
SL2610
October 2004
2
C

Related parts for SL2610

SL2610 Summary of contents

Page 1

... Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved. Wide Dynamic Range Image Reject MOPLL SL2610/IG/LH1Q 40 Pin MLP Tape & Reel, Bake & Drypack SL2610/IG/LH1N 40 Pin MLP Trays, Bake & Drypack SL2610/IG/LH2Q 40 Pin MLP Tape & Reel, Bake & Drypack* SL2610/IG/LH2N 40 Pin MLP Trays, Bake & ...

Page 2

... The SL2610 has high intermodulation intercept performance so offering high signal to spurious performance in the presence of higher amplitude interferers or in the presence of a wide bandwidth composite input signal. An output broadband level detect circuit is included for control of the tuner front end AGC. Quick Reference Data ...

Page 3

... SL2610 1 3 VccLO 31 LOHII/PB 32 LOHIO/PB 33 LOHIO/P 34 LOHII/P 35 VccLO 36 LOMIDOPB 37 LOMIDOP 38 LOLOWOPB 39 LOLOWOP 40 Figure 3 - SL2610 Evaluation Board Schematic Zarlink Semiconductor Inc Gnd 0 SCL 20 SDA 19 XTAL 18 CAP XTAL 17 PUMP CHARGE 16 DRIVE 15 P0 PORT 14 P0 OUT AGC 13 RF Vcc 12 B INPUT Data Sheet ...

Page 4

... SL2610 Figure 4 - SL2610 Evaluation Board Layout (Top) Figure 5 - SL2610 Evaluation Board Layout (Bottom) 4 Zarlink Semiconductor Inc. Data Sheet ...

Page 5

... Functional Description The SL2610 is a multi band RF mixer oscillator with image reject and on-board frequency synthesizer intended primarily for application in all band terrestrial tuners and requires a minimum external component count. It contains all elements required for RF downconversion to a standard IF with the exception of external VCO tank circuits. ...

Page 6

... Programming 2 The SL2610 is controlled data bus and is compatible with both standard and fast mode formats. Data and Clock are fed in on the SDA and SCL lines respectively as defined by I either accept data (write mode) or send data (read mode). The LSB of the address byte (R/W) sets the device into write mode low and read mode high ...

Page 7

... Logic ‘1’ = on. Logic ‘0’ = off (high impedance); default on power up. In test modes, when TE=1, ports P3-P0 respond according to T2-T0 respectively and previously transmitted data is lost. Test mode The test modes are invoked by setting bits T2–T0 as described in Table 5. SL2610 7 Zarlink Semiconductor Inc. Data Sheet ...

Page 8

... SL2610 ...

Page 9

... Band select bits (see Table passband select (see Table Test mode enable T2-T0 : Test mode control bits when TE=1 (see Table 5) P3-P0 : P3-P0 port output states POR : Power on reset indicator FL : Phase lock flag SL2610 ...

Page 10

... FL X -’don’t care’ SL2610 MA0 Address Input Voltage Level 0 0-0.1Vcc 1 Open circuit 0 0.4Vvcc – 0.6 Vcc # 1 0.9 Vcc - Vcc Table 4 - Address Selection ...

Page 11

... BS1 BS0 input Centre of Image Reject Passband 0 57 MHz 0 44 MHz 1 36 MHz Table SELECT function SL2610 µ Current in A Min. Typ. +85 +130 +190 +280 +420 +600 +930 +1300 Band Selected LO Band MID Band HI band HI band ...

Page 12

... Figure 6 - Crystal Oscillator Application IFOPB SL2610 5:1 IFOP Figure 7 - Ifamp Output Load Condition for Test Purposes C2 L1 7pF R16 D1 20R BB640 R1 4K7 L2 1u5H LOLOWOPB LOLOWOP Figure Band VCO Application 12 Zarlink Semiconductor Inc. XTALCAP SL2610 XTAL Ω load 120nH 100pF Data Sheet ...

Page 13

... SL2610 100pF 4K7 LOMIDOP Figure 9 - Mid Band VCO Application 8.2nH C16 100pF R6 L5 22nH 4K7 C11 C12 2p2 2p2 R17 10R LOHIIP LOHIOP LOHIOPB LOHIIPB Figure Band VCO Application 13 Zarlink Semiconductor Inc. 36nH D2 BB640 C10 ...

Page 14

... DEV1 VCC=4.7V PRm Cor START 50.000 000 MHz Figure 11 - LO, MID and HI Band Input Impedance Figure 12 - Low, Mid and Hi Band Noise Figure versus Frequency Zarlink Semiconductor Inc. SL2610 12 Mar 2002 15:10:11 -12.117 145.94 pF 90.000 000 MHz 2_: 150.74 -34.063 220 MHz 3_: 133.48 -62 ...

Page 15

... Figure 13 - Converter Third Order Two Tone Intermodulation Test Condition Spectrum, Input -14 dBm -54 dBm Figure 14 - Second Order Two Tone Intermodulation Test Condition Spectrum, Input Referred SL2610 df (6 MHz) f1- f2+df Referred, All Bands df f2- Zarlink Semiconductor Inc. Data Sheet ...

Page 16

... SL2610 CH1 3_: 101.43 DEV4 5.3V PRm START 32.000 000 MHz Figure 15 - Converter Output Impedance (Single Ended) CH1 1_: 173.88 PRm C? Avg 16 START 30.000 000 MHz Figure 16 - IFAMP Input Impedance 16 Zarlink Semiconductor Inc. 26 Nov 2002 13:38:57 -8.0313 347.67 pF 57.000 000 MHz 1_: 102 ...

Page 17

... START 30.000 000 MHz Figure 17 - IFAMP Output Impedance (Single Ended) 120 115 110 105 100 Figure 18 - Typical AGC Output Level Set versus AGCBIAS Voltage Zarlink Semiconductor Inc. SL2610 27 Nov 2002 08:59:45 1_: 58.967 8.8438 39.098 nH 36.000 000 MHz 2_: 59.295 11.096 44 MHz 3_: 60.443 14.813 57 MHz ...

Page 18

... Converter input referred IP2 Converter input referred IM2 Converter input referred IP3 Converter input referred IM3 Input referred P1dB Local oscillator operation range Local oscillator tuning range SL2610 Min. Typ. Max. Units Conditions 163 196 mA All switching ports off. 50 500 MHz See Figure 11 and refer to Note 8 ...

Page 19

... LO Vcc stability LO spurs due to RF pulling HI BAND ENABLED Input frequency range Input impedance Input Noise Figure Converter gain Conversion gain to IFAMP output Gain variation within channel Converter input referred IP2 SL2610 Min. Typ. Max. Units -55 dBc/Hz -86 dBc/Hz -109 dBc/ kHz/ ...

Page 20

... LO temperature stability LO turn on drift input leakage LO Vcc stability LO spurs due to RF pulling All Bands Converter output impedance Image rejection Isolation between band inputs Composite output amplitude SL2610 Min. Typ. Max. Units Conditions -40 dBc See Figure 14 and refer to Notes 4 and 6. 7 ...

Page 21

... AGC output level set Supply rejection Synthesiser SDA, SCL 19, 20 Input high voltage Input low voltage Input current Leakage current 19, 20 Hysterysis SDA output voltage 19 SCL clock rate 20 SL2610 Min. Typ. Max. Units 32 60 MHz Ω 200 18.5 22.5 dB Ω ...

Page 22

... Desired carrier at 80 dBµV, undesired carrier at 90 dBµ offset frequency of f where f is desired carrier frequency All intermodulation specifications are measured with a single-ended input. 7 Operation range is defined as the region over which the oscillator presents a negative impedance. 8 Target to achieve 6 dB minimum S11. SL2610 Min. Typ. Max. Units +3 +10 nA 0.5 mA ...

Page 23

... All voltages are referred to Vee Characteristic Supply voltage RF input voltage All I/O port DC offsets Total port current Storage temperature Junction temperature Package thermal resistance, chip to ambient Power consumption at 5.25V ESD protection SL2610 Min. Max. Units Conditions -0 117 dBµV Transient condition only. -0.3 Vcc+0 ...

Page 24

... AGCOUT 20K AGC Out 100 Ω 100 Ω CONVOPB CONVOP Converter Output Ω 25 IFIP IFIPB 1. Input Figure 19 - Input and Output Interface Circuits (RF Section) SL2610 1 nF External to Chip 35 LOHIIP 500 Ω V bias 32 LOHIPB 38 LOLOWOP LOMIDOP 40 V bias AGCBIAS 24 Zarlink Semiconductor Inc ...

Page 25

... Reference oscillator Vccd 500 K SCL/SDA * ACK * On SDA only SDA/SCL (pins 19 and 20) P0, P1, P2, P3 Output Ports (pins 14) Figure 20 - Input and Output Interface Circuits (PLL Section) SL2610 120 K 24 ADD Zarlink Semiconductor Inc. Data Sheet Vccd 16 PUMP 220 ...

Page 26

See Note 8. c Zarlink Semiconductor 2004 All rights reserved. ISSUE ACN DATE APPRD. 1 Package Code Previous package codes Package Outline for 40 Lead QFN Pull back lead ( 0.9 mm) 0.80 ...

Page 27

... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...

Related keywords