TS2GDOM44V-S Transcend Information. Inc., TS2GDOM44V-S Datasheet - Page 22

• Manufacturer Part Number: TS2GDOM44V-S
• Description: Transcend 44-pin Ide Flash Module
• Manufacturer: Transcend Information. Inc.

Initiating an Ultra DMA Data-Out Burst
shown in below: Ultra DMA Data-Out Burst Initiation Timing. The timing parameters are specified in Page
12: Ultra DMA Data Burst Timing Requirements and are described in Page 13:Ultra DMA Data Burst
Timing Descriptions.
The following steps shall occur in the order they are listed unless otherwise specifically allowed:
(a) The host shall keep -DMACK in the negated state before an Ultra DMA data burst is initiated.
(b) The device shall assert DMARQ to initiate an Ultra DMA data burst.
(c) Steps (c), (d), and (e) may occur in any order or at the same time. The host shall assert STOP.
(d) The host shall assert HSTROBE.
(e) In True IDE mode, the host shall not assert -CS0, -CS1, nor A[02:00].
(f) Steps (c), (d), and (e) shall have occurred at least t
(g) The device may negate -DDMARDY t
(h) The host shall negate STOP within t
(i) The device shall assert -DDMARDY within t
(j) The host shall drive the first word of the data transfer onto D[15:00]. This step may occur any time
(k) To transfer the first word of data: the host shall negate HSTROBE no sooner than t
keep -DMACK asserted until the end of an Ultra DMA data burst.
True IDE mode, once the device has negated -DDMARDY, the device shall not release -DDMARDY
until after the host has negated DMACK at the end of an Ultra DMA data burst.
after the first negation of HSTROBE.
DMARQ and -DDMARDY the device shall not negate either signal until after the first negation of
HSTROBE by the host.
during Ultra DMA data burst initiation.
has asserted -DDMARDY. The host shall negate HSTROBE no sooner than t
first word of data onto D[15:00].
Transcend Information Inc.
An Ultra DMA Data-out burst is initiated by following the steps lettered below. The timing diagram is
T
T
T
r
r
r
a
a
a
n
n
n
s
s
s
c
c
T
c
T
T
e
e
e
S
S
S
n
n
n
1
1
1
d
d
d
2
2
2
8
8
8
4
4
4
M
M
M
4
4
4
-
-
-
P
P
~
P
~
~
i
i
i
8
n
n
8
n
8
G
G
G
I
I
I
D
ENV
D
D
D
D
D
ZIORDY
E
E
E
O
O
O
after asserting -DMACK. The host shall not assert STOP until
M
F
F
M
F
M
LI
l
l
l
4
after the host has asserted -DMACK. While operating in
4
a
a
4
a
after the host has negated STOP. After asserting
4
s
4
s
4
s
22
V
h
V
h
V
h
ACK
-
-
-
M
M
S
S
M
S
before the host asserts -DMACK.The host shall
o
o
o
d
d
d
u
u
u
l
l
l
e
e
e
DVS
after the driving the
UI
after the device
Ver 1.2