ISL8104 Intersil Corporation, ISL8104 Datasheet - Page 9

• Manufacturer Part Number: ISL8104
• Description: Synchronous Buck Pulse-Width Modulator (PWM) Controller
• Manufacturer: Intersil Corporation

Locate the ISL8104 within 2 to 3 inches of the MOSFETs, Q1
and Q2 (1 inch or less for 500kHz or higher operation). The
circuit traces for the MOSFETs’ gate and source connections
from the ISL8104 must be sized to handle up to 3A peak
current. Minimize any leakage current paths on the SS pin
and locate the capacitor, C
internal current source is only 30µA. Provide local V
decoupling between VCC and GND pins. Locate the
capacitor, C
the phase node.
Compensating the Converter
The ISL8104 Single-phase converter is a voltage-mode
controller. This section highlights the design consideration for a
voltage-mode controller requiring external compensation. To
address a broad range of applications, a type-3 feedback
network is recommended (see Figure 6).
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage is
regulated to the reference voltage level. The error amplifier
output is compared with the oscillator triangle wave to
provide a pulse-width modulated wave with an amplitude of
V
output filter. The output filter capacitor bank’s equivalent
series resistance is represented by the series resistor ESR.
The modulator transfer function is the small-signal transfer
function of V
DC gain and shaped by the output filter, with a double pole
break frequency at F
of this analysis, L and DCR represent the output inductance
and its DCR, while C and ESR represents the total output
capacitance and its equivalent series resistance.
F
LC
IN
FIGURE 6. COMPENSATION CONFIGURATION FOR THE
at the PHASE node. The PWM wave is smoothed by the
=
---------------------------
2π
C
R
3
⋅
3
1
BOOT
L C
OUT
⋅
ISL8104 CIRCUIT
/V
as close as practical to the BOOT pin and
COMP
R
LC
R
1
2
and a zero at F
VOUT
. This function is dominated by a
F
C
CE
ss
2
C
close to the SS pin as the
=
9
1
-------------------------------- -
2π C ESR
⋅
COMP
1
FB
⋅
CE
. For the purpose
ISL8104
CC
ISL8104
The compensation network consists of the error amplifier
(internal to the ISL8104) and the external R
components. The goal of the compensation network is to
provide a closed loop transfer function with high 0dB crossing
frequency (F
phase margin (better than 45 degrees). Phase margin is the
difference between the closed loop phase at F
The equations that follow relate the compensation network’s
poles, zeros and gain to the components (R
and C
locating the poles and zeros of the compensation network:
1. Select a value for R
FIGURE 7. VOLTAGE-MODE BUCK CONVERTER
value for R
setting the output voltage to be equal to the reference set
voltage as shown in Figure 7, the design procedure can
be followed as presented. As the ISL8104 supports 100%
duty cycle, D
ramp amplitude (V
simplifies to:
R
R
CIRCUIT
2
2
PWM
3
) in Figures 6 and 7. Use the following guidelines for
=
=
--------------------------------------------- -
D
1.9 R
------------------------------ -
V
COMP
V
MAX
OSC
IN
0
⋅
COMPENSATION DESIGN
; typically 0.1 to 0.3 of F
⋅
2
HALF-BRIDGE
1
F
⋅
OSCILLATOR
for desired converter bandwidth (F
⋅
V
MAX
LC
⋅
V
R
F
IN
OSC
E/A
DRIVE
1
0
⋅
⋅
R
F
F
equals 1. The ISL8104 uses a fixed
OSC
ISL8104
2
LC
0
1
C
+
-
(1kΩ to 10kΩ, typically). Calculate
VREF
2
) of 1.9V, the above equation
C
1
FB
PHASE
UGATE
LGATE
EXTERNAL CIRCUIT
GND
SW
R
3
V
IN
) and adequate
R
1
1
1
, R
-R
C
L
3
0dB
3
2
, C
, R
February 13, 2006
DCR
and 180°.
V
1
3
ESR
OUT
-C
0
, C
C
). If
3
FN9257.0
1
, C
2
,