ISL6327 Intersil Corporation, ISL6327 Datasheet - Page 12

• Manufacturer Part Number: ISL6327
• Description: Enhanced 6-Phase PWM Controller
• Manufacturer: Intersil Corporation

www.DataSheet4U.com
PWM Operation
The timing of each converter is set by the number of active
channels. The default channel setting for the ISL6327 is six.
The switching cycle is defined as the time between PWM
pulse termination signals of each channel. The cycle time of
the pulse termination signal is the inverse of the switching
frequency set by the resistor between the FS pin and
ground. The PWM signals command the MOSFET drivers to
turn on/off the channel MOSFETs.
In the default 6-phase operation, the PWM2 pulse happens
1/6 of a cycle after PWM1, the PWM3 pulse happens 1/6 of
a cycle after PWM2, the PWM4 pulse happens 1/6 of a cycle
after PWM3, the PWM5 pulse happens 1/6 of a cycle after
PWM4, and the PWM6 pulse happens 1/6 of a cycle after
PWM5.
The ISL6327 works in 2, 3, 4, 5, or 6 phase configuration.
Connecting the PWM6 to VCC selects 5-phase operation
and the pulse times are spaced in 1/5 cycle increments.
Connecting the PWM5 to VCC selects 4-phase operation
and the pulse times are spaced in 1/4 cycle increments.
Connecting the PWM4 to VCC selects 3-phase operation
and the pulse times are spaced in 1/3 cycle increments.
Connecting the PWM3 to VCC selects 2-phase operation
and the pulse times are spaced in 1/2 cycle increments.
Switching Frequency
The switching frequency is determined by the selection of
the frequency-setting resistor, R
FS pin to GND (see the figures labelled Typical Applications
on pages 4 and 5). Equation 3 is provided to assist in
selecting the correct resistor value.
R
where F
Current Sensing
ISL6327 senses the current continuously for fast response.
ISL6327 supports inductor DCR sensing, or resistive
sensing techniques. The associated channel current sense
amplifier uses the ISEN inputs to reproduce a signal
proportional to the inductor current, I
I
regulation, and the overcurrent protection.
The internal circuitry, shown in Figures 3 and 4, represents
one channel of an N-channel converter. This circuitry is
repeated for each channel in the converter, but may not be
active depending on the status of the PWM3, PWM4,
PWM5, and PWM6 pins, as described in the PWM Operation
section.
INDUCTOR DCR SENSING
An inductor’s winding is characteristic of a distributed
resistance as measured by the DCR (Direct Current
SEN
T
=
, is used for the current balance, the load-line
2.5X10
------------------------- - 600
F
SW
SW
is the switching frequency of each phase.
10
–
12
T
, which is connected from
L
. The sensed current,
(EQ. 3)
ISL6327
Resistance) parameter. Consider the inductor DCR as a
separate lumped quantity, as shown in Figure 3. The
channel current I
pass through the DCR. Equation 4 shows the s-domain
equivalent voltage across the inductor V
A simple R-C network across the inductor extracts the DCR
voltage, as shown in Figure 3.
The voltage on the capacitor V
proportional to the channel current I
If the R-C network components are selected such that the
RC time constant (= R*C) matches the inductor time
constant (= L/DCR), the voltage across the capacitor V
equal to the voltage drop across the DCR, i.e., proportional
to the channel current.
With the internal low-offset current amplifier, the capacitor
voltage V
Therefore the current out of ISEN+ pin, I
to the inductor current.
Because of the internal filter at ISEN- pin, one capacitor C
is needed to match the time delay between the ISEN- and
ISEN+ signals. Select the proper C
constant of R
V
V
C
L
=
=
ISL6327 INTERNAL CIRCUIT
CURRENT
I
⎛
⎝
-------------------------------------------------------------------- -
L
s
SENSE
⋅
⋅
FIGURE 3. DCR SENSING CONFIGURATION
(
C
I
-------------
DCR
s L
n
I
SEN
is replicated across the sense resistor R
⋅
L
ISL6609
(
ISEN
s RC
+
+
⋅
=
DCR
1
L
PWM(n)
⎞
⎠
, flowing through the inductor, will also
I
L
and C
⋅
+
(
----------------- -
R
)
DCR
DCR I
1
ISEN
)
+
-
T
⋅
(R
V
L
IN
)
ISEN
C
, can be shown to be
ISEN-(n)
ISEN+(n)
x C
INDUCTOR
R
T
L
L
, see Equation 5.
to keep the time
I
T
L
) close to 27ns.
s ( )
V
L
L
SEN
V
.
DCR
C
-
C
(s)
, is proportional
-
R
(PTC)
C
ISEN(n)
T
C
June 5, 2006
V
OUT
ISEN
OUT
(EQ. 4)
(EQ. 5)
FN9276.1
C
.
is
T