ISL6313B Intersil Corporation, ISL6313B Datasheet - Page 13

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ISL6313B

Manufacturer Part Number
ISL6313B
Description
Two-Phase Buck PWM Controller
Manufacturer
Intersil Corporation
Datasheet

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Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 6. The channel current
I
Equation 4 shows the s-domain equivalent voltage, V
across the inductor.
A simple R-C network across the inductor (R
extracts the DCR voltage, as shown in Figure 6. The voltage
across the sense capacitor, V
proportional to the channel current I
If the R
their time constant matches the inductor L/DCR time
constant, then V
DCR.
The capacitor voltage V
effective internal sense resistance R
current through R
current. This current, I
then used by the controller for load-line regulation, channel-
current balancing, and overcurrent detection and limiting.
Equation 6 shows that the proportion between the channel
current, I
value of the effective sense resistance, R
of the inductor.
L
V
V
, flowing through the inductor, passes through the DCR.
L
www.DataSheet4U.com
C
FIGURE 6. INDUCTOR DCR CURRENT SENSING
s ( )
MOSFET
s ( )
DRIVER
=
=
1
-C
SENSE
L
I
---------------------------------------- - DCR I
(
L
, and the sensed current, I
s R
1
I
n
(
-------------
DCR
network components are selected such that
s L
s L
CONFIGURATION
1
UGATE
LGATE
C
I
C
SEN
+
ISEN
+
1
is equal to the voltage drop across the
DCR
ISL6313B INTERNAL
1
+
1
+
-
SEN
)
which is proportional to the inductor
CIRCUIT
)
C
, is then replicated across the
, is continuously sensed and is
V
R
V
13
C
IN
ISEN
C
, can be shown to be
(s)
L
-
L
INDUCTOR
R
ISEN
SEN
, shown in Equation 5.
1
L
V
ISEN-
ISEN+
RSET
L
I
(s)
L
, is driven by the
. This develops a
ISEN
V
R
C
DCR
SET
-
(s)
C
1
1
, and the DCR
and C)
-
VCC
C
V
OUT
L
(EQ. 4)
(EQ. 5)
OUT
,
ISL6313B
The effective internal R
current sensing process because it sets the gain of the load
line regulation loop as well as the gain of the channel-current
balance loop and the overcurrent trip level. The effective
internal R
through use of the RSET pin. Placing a single resistor, R
from the RSET pin to the VCC pin programs the effective
internal R
important to note that the R
between 20kΩ and 80kΩ for Equation 7 to be valid.
Output Voltage Setting
The ISL6313B uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3 or 4. In the Intel
VR11 mode of operation, each VID pin is pulled up to an
internal 1.2V voltage by a weak current source (40µA),
which decreases to 0A as the voltage at the VID pin varies
from 0 to the internal 1.2V pull-up voltage. In AMD modes of
operation the VID pins are pulled low by a week 20µA
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
.
The ISL6313B accommodates three different DAC ranges:
Intel VR11, AMD K8/K9 5-bit, and AMD 6-bit. The state of
the SS and VID7 pins decide which DAC version is active.
Refer to Table 1 for a description of how to select the desired
DAC version.
R
I
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0
SEN
ISEN
*Note: R
0
0
0
0
0
0
0
DAC VERSION
INTEL VR11
AMD 5-BIT
AMD 6-BIT
TABLE 2. VR11 VOLTAGE IDENTIFICATION CODES
=
=
I
L
0
0
0
0
0
0
0
SET
--------- - R
400
ISEN
ISEN
3
TABLE 1. ISL6313B DAC SELECT TABLE
----------------- -
R
DCR
must be between 20kΩ and 80kΩ
ISEN
resistance according to Equation 7 below. It is
resistance is user programmable and is set
0
0
0
0
0
0
0
SET
R
R
R
0
0
0
0
0
0
0
SS
SS
SS
ISEN
resistor tied to GND
resistor tied to VCC
resistor tied to VCC
SET
0
0
0
0
0
0
0
resistance is important to the
SS PIN
resistance value must be
0
0
0
0
1
1
1
0
0
1
1
0
0
1
November 6, 2008
0
1
0
1
0
1
0
VID7 PIN
high
low
(EQ. 6)
-
1.60000
1.59375
1.58750
1.58125
1.57500
VDAC
FN6809.0
(EQ. 7)
OFF
OFF
SET
,

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