NCV8851B ON Semiconductor, NCV8851B Datasheet - Page 3

• Manufacturer Part Number: NCV8851B
• Description: Automotive Grade Synchronous Buck Controller
• Manufacturer: ON Semiconductor

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
MAXIMUM RATINGS
PACKAGE PIN DESCRIPTIONS − 20 Lead TSSOP
Dc Supply Voltage (V
Dc Supply Voltage (V
Dc Supply Voltage (V
Pin Voltage (V
Pin Voltage (BST, GH)
Pin Voltage (GL)
Pin Voltage (EN)
Pin Voltage (CSP, CSN)
Pin Voltage (V
Pin Voltage (PGND)
Operating Junction Temperature
Storage Temperature Range
Peak Reflow Soldering Temperature: Lead−free 60 to 150 seconds at 217°C
Package Pin#
Peak Transient Voltage (Load Dump)
t
≤
50 ns
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
SW
FB
, V
)
COMP
IN
IN_CS
IN_IC
)
Pin Symbol
, CS
(Voltages are with respect to AGND unless otherwise indicated.)
)
C
V
V
CS
PGND
6V
AGND
SYNC
V
)
R
CSN
CSP
BST
V
COMP
C
IN_CS
V
COMP
GH
V
IN_IC
GL
EN
OSC
SW
OUT
OUT
FB
OUT
FB
IN
, C
FB
, C
COMP
External clock synchronization input.
Supply input for the internal current sense amplifier.
Supply input for internal logic and analog circuitry.
Supply input for the floating top gate driver. An external diode, D
0.1 mF to 1 mF capacitor, C
Gate driver output for the external high−side NMOS FET.
Switch−node. This pin connects to the source of the high−side MOSFET and drain of the
low−side MOSFET. This pin serves as the switch output to the inductor.
Gate driver output for the external low−side NMOS FET.
Power Ground. Ground reference for the high−current path including the NMOS FETs and
output capacitor.
Output of internal fixed 6.0 V LDO.
Analog Ground. Ground reference for the internal logic and analog circuitry as well as R
and the compensators.
Enable input. When disabled, the LDO, internal logic and analog circuitry and gate drivers
enter sleep mode, drawing under 1 mA.
Supply input for the SMPS.
SMPS’s voltage feedback. Inverting input to the voltage error amplifier. Connect to V
through a resistive divider.
SMPS’s voltage error amplifier output and non−inverting input to the current error amplifier.
SMPS’s current error amplifier output and inverting input to the PWM comparator.
SMPS’s current feedback. Inverting input to the current error amplifier.
Single−ended output of the differential current sense amplifier. Connect to C
istor. Non−inverting input to the cycle−by−cycle overcurrent comparator.
Differential current sense amplifier inverting input.
Differential current sense amplifier non−inverting input.
Oscillator’s frequency adjust pin. Resistor to ground sets the oscillator frequency.
Rating
, SYNC, R
OSC
http://onsemi.com
NCV8851B
, 6V
OUT
3
)
BST
www.DataSheet.co.kr
, to V
SW
forms a boost circuit.
Function
−0.3 to 7 wrt PGND
BST
46 wrt PGND
−0.7 to 40.7
−0.3 to 0.3
−40 to 150
−65 to 150
−0.3 to 40
7 wrt V
−0.3 to 40
−0.3 to 10
265 peak
−0.3 to 7
, from 6V
Value
6.5
45
46
−2
SW
FB
OUT
through a res-
and a
OUT
Unit
OSC
°C
°C
°C
V
V
V
V
V
V
V
V
V
V
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