MC145162 Motorola, MC145162 Datasheet - Page 6

• Manufacturer Part Number: MC145162
• Description: 60 MHz and 85 MHz Universal Programmable Dual PLL Frequency Synthesizers
• Manufacturer: Motorola

INPUT PINS
OSC in /OSC out
Reference Oscillator Input/Output (Pins 7, 8)
an external parallel–resonant crystal. Figure 6 shows the
relationship of different crystal frequencies and reference
frequencies for cordless phone applications in various coun-
tries. OSC in may also serve as input for an externally gen-
erated reference signal which is typically ac coupled.
MCUCLK
System Clock (Pin 5)
(OSC out ) divided by 3 or 4 that is controlled by a bit in the
control register.
tem clocks.
AD in , D in , CLK, ENB
Auxiliary Data In, Data In, Clock, Enable (Pins 2, 3, 1, 4)
gramming the reference counter, the transmit–channel count-
er, and the receive–channel counter. They also provide
various controls of the PLL including the power saving mode
and the programming format.
TxPS/f Tx , RxPS/f Rx
Transmit Power Save, Receive Power Save (Pins 13, 11)
status of the internal power saving mode operation. If the
transmit–channels counter circuitry is in power down mode,
TxPS/f Tx outputs a high state. If the receive–channels
counter circuitry is in power down mode, RxPS/f Rx is set high.
These outputs can be applied for controlling the external pow-
er switch for the transmitter and the receiver to save MCU
control pins.
RxPS/f Rx pins output the divided value of the transmit
channel counter (f Tx ) and the receive channel counter (f Rx ),
respectively. This test mode operation is controlled by the
MC145162 MC145162–1
6
These pins form a reference oscillator when connected to
This output pin provides a signal of the crystal frequency
This signal can be a clock source for the MCU or other sys-
These four pins provide an MCU serial interface for pro-
For a normal application, these output pins provide the
In the Tx/Rx channel counter test mode, the TxPS/f Tx and
OSC out
OSC in
Figure 6. Reference Frequencies for Cordless Phone Applications of Various Countries
PIN DESCRIPTIONS
11.150 MHz
11.150 MHz
10.240 MHz
12.000 MHz
Crystal
N Value
446
223
512
600
M (14 BITS)
N (12 BITS)
control register. Details of the counter test mode are in the Tx/
Rx Channel Counter Test section of this data sheet.
f in –T/f in –R
Transmit/Receive Counter Inputs (Pins 14, 9)
counters, respectively. These signals are typically driven from
the loop VCO and ac coupled. The minimum input signal level
is 200 mV p–p @ 60.0 MHz.
OUTPUT PINS
TxPD out /RxPD out
Transmit/Receive Phase Detector Outputs (Pins 15, 10)
phase detectors for use as loop error signals (see Figure 7 for
phase detector output waveforms). Phase detector gain is
V DD /4
LD
Lock Detect (Pin 16)
The output at a high level indicates an out–of–lock condition
(see Figure 7 for the LD output waveform).
POWER SUPPLY
V DD
Positive Power Supply (Pin 12)
from 2.5 to 5.5 V with respect to V SS .
V SS
Negative Power Supply (Pin 6)
connected to ground.
f in –T and f in –R are inputs to the transmit and the receive
These are three–state outputs of the transmit and receive
Frequency f V > f R or f V leading: output = negative pulse.
Frequency f V < f R or f V lagging: output = positive pulse.
Frequency f V = f R and phase coincidence: output = high–
NOTE: f R is the divided–down reference frequency at the
The lock detect signal is associated with the transmit loop.
V DD is the most positive power supply potential ranging
V SS is the most negative supply potential and is usually
impedance state.
phase detector input and f V is the divided–down VCO
frequency at the phase detector input.
6.25 kHz
12.5 kHz
f R1 B
5.0 kHz
5.0 kHz
volts per radian.
25
4
f R2 C
1.0 kHz
A
B
C
D
MOTOROLA
f R1
f R2