MC145162 Motorola, MC145162 Datasheet - Page 11

• Manufacturer Part Number: MC145162
• Description: 60 MHz and 85 MHz Universal Programmable Dual PLL Frequency Synthesizers
• Manufacturer: Motorola

programming word. The user can either select the “fixed”
reference frequency for all channels accordingly or provide a
specific reference frequency for a particular channel by using
two reference frequency counters (e.g., for an application in
France, the base set transmit channel common fixed refer-
ence frequency is 6.25 kHz or 12.5 kHz). (See Table 3 and
Figure 6 for reference frequencies for various countries.)
However, transmit channels 6, 8, and 14 can be set to
25 kHz, and channel 8 reference frequency can be set to
50 kHz. But this reference frequency may not be applied to
the receiving side; therefore, the receiving side reference fre-
quency must be generated by another reference frequency
counter. The higher the reference frequency, the better the
phase noise performance and faster the lock time, but the
PLL consumes more current if both reference frequency
counters are in operation.
MOTOROLA
Figure 16 shows the bit function of the reference frequency
In general, the 12–bit reference frequency counter plus the
4 and
REFERENCE FREQUENCY SELECTION
25 module can offer all the reference frequencies
U.S.A.
France
Spain
Australia
U.K.
New Zealand
AND PROGRAMMING
Country
Table 3. Global CT–1 Reference Frequency Setting vs Channel Frequencies
NOTE: ENB must be low during the serial transfer.
AD in
Figure 15. Programming Format for Transmit and Receive Counters
ENB
CLK
D in
46/49 MHz (10, 15, 25 Channels)
26/41 MHz
31/41 MHz
30/39 MHz
1.7/47 MHz
1.7/34/40 MHz
Channels Frequency
16–BIT Tx COUNTER
16–BIT Rx COUNTER
(4–Pin Interfacing Scheme)
DIVIDE RATIO
DIVDE RATIO
for global CT–1 transmit and receive channel requirements.
Users can select their own reference frequency by intro-
ducing the additional 14–bit auxiliary reference frequency
counter.
be shut down by the auxiliary reference enable bit in the refer-
ence counter programming word by setting the bit to 0. At this
state, the f R2 is automatically connected to point C (the
block output), and f R1 can be connected to point A or B by set-
ting the f R1 –S1 and f R1 –S2 bits in the reference counter pro-
gram word. The 14–bit auxiliary reference frequency counter
data will be in “Don’t Care” state.
enabled (auxiliary reference enable = 1), then f R2 is auto-
matically connected to point D (14–bit counter output), and
f R1 can be selected to connect to point A, B, or C, depending
on the bit setting of f R1 –S1 and f R1 –S2.
reference enable bit and the f R1 –S1 and f R1 –S2 bits
selection.
Again, the 14–bit auxiliary reference frequency counter can
If the 14–bit auxiliary reference frequency counter is
Table 4 and Figure 16 describe the functions of the auxiliary
6.25 kHz/12.5 kHz
CLOCK
LAST
6.25 kHz
6.25 kHz
5.0 kHz
5.0 kHz
5.0 kHz
f R1
1.0 kHz
1.0 kHz
MC145162 MC145162–1
f R2
—
—
—
—
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