MC1151A PMD, MC1151A Datasheet - Page 4

• Manufacturer Part Number: MC1151A
• Description: (MC1x51A) Advanced Step Motor Control Chipset
• Manufacturer: PMD

Electrical Characteristics
Overview
The MC1451A-consists of either two 68 pin PLCC's (standard version),
or these same two I.C.s with an additional 44 pin PLCC for incremental
encoder feedback (-E version). All of these devices are fabricated in
CMOS. The two 68 pin PLCCs are known as the I/O and the CP chips.
The 44-pin PLCC is known as the ENC chip.
The Peripheral Input/Output IC (I/O chip) is responsible for interfacing
to the host processor and for generating the high speed pulse and
direction output. The Command Processor IC (CP chip) is responsible
for all host command, trajectory, and related computations. The ENC
chip is responsible for incremental encoder feedback.
The following figure shows a typical system block diagram, along with
the pin connections between the I/O chip, CP chip, and ENC chip if it is
used.
Use of the ENC chip does not require a special version of the I/O or CP
chips. The CP chip automatically recognizes the presence or absence
of the ENC chip and functions accordingly.
The CP, I/O, and ENC chip (if used) form a complete chipset and
function together as one integrated motion processor. The major
components connected to the chipset are the step & direction
compatible amplifier (4, 2, or 1 axes), the optional encoder feedback
channels (4, 2, or 1 axes), and the host processor.
The chipset's pulse and direction output signals are connected to the
motor amplifier. Using this scheme the direction bit indicates whether
the motor should move in the positive or negative direction, and the
pulse signal indicates the desired motor speed. Pulse and direction
output is compatible with a wide variety of full, half, and microstepping
amplifiers.
Processor
I/O
Host
I/OAddr0-3
I/OCntrl0-3
Data4-11
(1-4 axis)
I/OWrite
Amplifier
ClkOut
(4 axis)
Motor
CP
I/OAddr0-3
I/OCntrl0-3
Data4-11
I/OWrite
ClkOut
(1-4 axis)
Encoder
ENC
4
Using the -E chipset parts it is possible to input quadrature encoder
feedback to the chipset. The encoder signals consist of the A and B
quadrature signals from the encoder.
The host processor is interfaced via an 8-bit bi-directional bus and
various control signals. Host communication is coordinated by a
ready/busy signal, which indicates when communication is allowed.
Interconnections between the I/O and the CP chip consist of a data bus
(8 bits) and various control and synchronization signals.
Interconnections between the CP and the ENC chip (if used) also
consist of a data bus (10 bits) and various control and synchronization
signals. Many of these signals are common between the I/O, CP, and
the ENC chips although there are no direct connections between just
the ENC and the I/O chip. The following table summarizes the signals
that must be interconnected for the chipset to function properly. For
each listed signal the I/O chip pin on the left side of the table is
connected to the CP chip pin in the middle which is connected to the
ENC chip pin on the right side.
I/O Chip
Signal
Name
-
-
CPData4
CPData5
CPData6
CPData7
CPData8
CPData9
CPData10
CPData11
CPAddr0
CPAddr1
CPAddr2
CPAddr3
CPCntr0
CPCntr1
CPCntr2
CPCntr3
CPWrite
CPClk
CPReset
For a complete description of all pins see the 'Pin Descriptions'
section of this manual.
Unless specifically noted otherwise, the term 'MC1451' or
'MC1451A' refers to the MC1451A, MC1251A, MC1151A, MC1451A-
E, MC1251A-E, and MC1151A-E Motion Processors.
I/O
Chip
Pin
-
-
18
5
6
7
8
17
3
1
68
27
29
12
20
36
22
63
2
46
43
CP Chip
Signal
Name
Data2
Data3
Data4
Data5
Data6
Data7
Data8
Data8
Data10
Data11
I/OAddr0
I/OAddr1
I/OAddr2
I/OAddr3
I/OCntr0
I/OCntr1
I/OCntr2
I/OCntr3
I/OWrite
ClkOut
Reset
CP
Chip
Pin
58
57
50
49
46
43
40
39
36
35
28
9
6
5
16
18
68
67
15
19
17
CPData4
CPData9
CPData10
CPData11
CPAddr0
-
CPAddr2
CPAddr3
CPCntr0
-
-
-
CPWrite
-
ENC Chip
Signal
Name
CPData2
CPData3
CPData5
CPData6
CPData7
CPData8
CPClk
ENC
Chip
Pin
22
19
9
31
41
42
44
1
12
2
24
-
20
23
15
-
-
-
13
7
-