CT2554 Aeroflex Circuit Technology, CT2554 Datasheet - Page 30

no-image

CT2554

Manufacturer Part Number
CT2554
Description
Ct2553 / 2554 / 2555 / 2556 Advanced Integrated Mux Aim Hybrid For Mil-std-1553
Manufacturer
Aeroflex Circuit Technology
Datasheet
Aeroflex Circuit Technology
DBAC, RTU/BC, MT, CTLIN B/A
SSFLAG, SSBUSY, SVCRQST
SYMBOL
tpw1
td1
td2
td6
tz
tr
1. STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
2. CPU must release STRBD within 1.5µs of IOEN going active. READYD will go away within one clock cycle maximum.
NOTE:
16MHz Clock
(Internal)
MEM/REG
READYD
D15-D00
SELECT
STRBD
RD/WR
IOEN
A02
A01
A00
Figure 33 – CPU Reads from Internal Register Timing
DESCRIPTION
READYD low delay (CPU Handshake)
IOEN high delay (CPU Handshake)
READYD pulse width (CPU Handshake)
Internal Register delay (read)
READYD to STRBD release
(SELECT
CPU Reads from Internal Register
See Note 1
STRBD) to IOEN
tz
30
See Note 2
td1
DATA VALID
td6
MIN
70
-
-
-
-
-
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
tr
tpw1
MAX
1.37
200
1.8
20
60
-
td2
UNITS
ns
ns
ns
ns
µs
µs

Related parts for CT2554