P123-09H PhaseLink Corp., P123-09H Datasheet - Page 5

no-image

P123-09H

Manufacturer Part Number
P123-09H
Description
Low Skew Zero Delay Buffer
Manufacturer
PhaseLink Corp.
Datasheet
SWITCHING CHARACTERISTICS
Notes:
4. Parameter is guaranteed by design and characterization. Not 100% tested in production.
5. All parameters are specified with loaded outputs.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 4/9/08 Page 5
Parameter Name
t
t
t
t
t
t
t
t
t
t
1
3
4
5
6A
6B
7
8
J
LOCK
Output Frequency
Duty Cycle
Duty Cycle
Rise Time
Rise Time
Fall Time
Fall Time
Output to Output Skew
Delay, REF Rising Edge to
CLKOUT Rising Edge
Delay, REF Rising Edge to
CLKOUT Rising Edge
Device to Device Skew
Output Slew Rate
Cycle to Cycle Jitter
PLL Lock Time
[4]
[4]
[4]
[4]
[4]
[4]
(High Drive)
(High Drive)
= t2 ÷ t1
= t2 ÷ t1
[4]
[4]
[4]
[4]
[4]
[4]
30-pF load
10-pF load
Measured at 1.4V, F
Measured at 1.4V, F
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
All outputs equally loaded
Measured at VDD/2
Measured at VDD/2. Measured in PLL bypass
mode, PL123-09 only.
Measured at VDD/2 on the CLKOUT pin
Measured between 0.8V and 2.0V using Test
Circuit #2
Measured at 66.67 MHz, loaded outputs
Stable power supply, valid clock presented on
REF pin
Test Conditions
[5]
OUT
OUT
= 66.67MHz
<50MHz
Low Skew Zero Delay Buffer
(Preliminary)
Min.
10
10
40
45
1
1
Typ.
2.5
1.5
2.5
1.5
50
50
75
0
5
0
±350
Max.
100
134
250
700
200
8.5
60
55
1
MHz
MHz
V/ns
Unit
ms
ns
ns
ns
ns
ps
ps
ns
ps
ps
%
%

Related parts for P123-09H