MT8885 Mitel Networks Corporation, MT8885 Datasheet - Page 8

• Manufacturer Part Number: MT8885
• Description: Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
• Manufacturer: Mitel Networks Corporation

MT8885
Distortion Calculations
The MT8885 is capable of producing precise tone
bursts with minimal error in frequency (see Table 2).
The internal summing amplifier is followed by a first-
order lowpass switched capacitor filter to minimize
harmonic components and intermodulation products.
The total harmonic distortion for a single tone can be
calculated using Equation 1, which is the ratio of the
total power of all the extraneous frequencies to the
power of the fundamental frequency expressed as a
percentage.
The
correspond to V
waveform. The total harmonic distortion for a dual
tone can be calculated using Equation 2. V
correspond to the low group amplitude and high
group amplitude, respectively and V
of all the intermodulation components. The internal
switched-capacitor filter following the D/A converter
keeps distortion products down to a very low level as
shown in Figure 10.
4-58
Table 2. Actual Frequencies Versus Standard
THD (%) = 100
THD (%) = 100
ACTIVE
INPUT
H1
H2
H3
H4
L1
L2
L3
L4
Fourier
Equation 1. THD (%) For a Single Tone
Equation 2. THD (%) For a Dual Tone
OUTPUT FREQUENCY (Hz)
SPECIFIED
components
2f
1209
1336
1477
1633
697
770
852
941
.... V
Requirements
V
2
nf
2L
V
V
as measured on the output
+
2
2
3H
V
2f
2
V
+ ..
+ V
3L
ACTUAL
1215.9
1331.7
1471.9
1645.0
2
V
699.1
766.2
847.4
948.0
of
L
+ ....
fundamental
V
2
+
3f
2
V
nH
+ V
the
2
V
H
+
2
nL
2
2
V
4f
IMD
2
+
IMD
+ .... V
tone
V
%ERROR
2
is the sum
2H
+0.30
+0.74
+0.57
+0.73
-0.49
-0.54
-0.32
-0.35
L
+
2
and V
nf
output
H
DTMF Clock Circuit
The internal clock circuit is completed with the
addition of a standard television colour burst crystal
having a resonant frequency of 3.579545 MHz. A
number of MT8885 devices can be connected as
shown in Figure 11 such that only one crystal is
required. Alternatively, the OSC1 inputs on all
devices can be driven from a TTL buffer with the
OSC2 outputs left unconnected.
Microprocessor Interface
The MT8885 design incorporates an adaptive
interface, which allows it to be connected to various
kinds of microprocessors. Key functions of this
interface include the following:
•
•
•
•
•
Figure 16 shows the timing diagram for Motorola
microprocessors with separate address and data
buses. Members of this microprocessor family
include 2 MHz versions of the MC6800, MC6802 and
MC6809. For the MC6809, the chip select (CS) input
signal is formed by NANDing the (E+Q) clocks and
address decode output. For the MC6800 and
MC6802, CS is formed by NANDing VMA and
address decode output. On the falling edge of CS,
the internal logic senses the state of data strobe
OSC1 OSC2
Continuous activity on DS/RD is not necessary
to update the internal status registers.
senses whether input timing is that of an Intel or
Motorola controller by monitoring the DS (RD),
R/W (WR) and CS inputs.
generates equivalent CS signal for internal
operation for all processors.
differentiates between multiplexed and non-
multiplexed microprocessor buses. Address
and data are latched in accordingly.
compatible with Motorola and Intel processors.
3.579545 MHz
MT8885
Figure 11 - Common Crystal Connection
OSC1 OSC2
MT8885
Advance Information
OSC1 OSC2
MT8885