FM28V010 Ramtron Corporation, FM28V010 Datasheet - Page 2

no-image

FM28V010

Manufacturer Part Number
FM28V010
Description
128kbit Bytewide F-ram Memory Features
Manufacturer
Ramtron Corporation
Datasheet
Pin Descriptions
Rev. 1.0
Oct. 2010
Pin Name
A(13:0)
/CE
/WE
/OE
DQ(7:0)
VDD
VSS
CE
WE
A(13:0)
OE
Supply
Supply
Type
Input
Input
Input
Input
I/O
Pin Description
Address inputs: The 14 address lines select one of 16,384 bytes in the F-RAM array. The
address value is latched on the falling edge of /CE. Addresses A(2:0) are used for page
mode read and write operations.
Chip Enable input: The device is selected and a new memory access begins on the falling
edge of /CE. The entire address is latched internally at this point.
Write Enable: A write cycle begins when /WE is asserted. The rising edge causes the
FM28V010 to write the data on the DQ bus to the F-RAM array. The falling edge of /WE
latches a new column address for fast page mode write cycles.
Output Enable: When /OE is low, the FM28V010 drives the data bus when valid data is
available. Deasserting /OE high tri-states the DQ pins.
Data: 8-bit bi-directional data bus for accessing the F-RAM array.
Supply Voltage
Ground
Control
Logic
A(2:0)
A(13:3)
Figure 1. Block Diagram
I/O Latch & Bus Driver
Column Decoder
F-RAM Array
2K x 64
. . .
FM28V010 - 16Kx8 F-RAM
DQ(7:0)
Page 2 of 13

Related parts for FM28V010