APL5915 Anpec Electronics Corporation, APL5915 Datasheet

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APL5915

Manufacturer Part Number
APL5915
Description
0.8v Reference Ultra Low Dropout 0.2v@1.5a Linear Regulator
Manufacturer
Anpec Electronics Corporation
Datasheet
APL5915
Features
Applications
Copyright
Rev. A.3 - Apr., 2008
(RoHS Compliant)
Note Book PC Applications
Motherboard Applications
VGA Card Applications
Ultra Low Dropout
- 0.2V(typical) at 1.5A Output Current
Low ESR Output Capacitor (Multi-layer Chip
Capacitors (MLCC)) Applicable
0.8V Reference Voltage
High Output Accuracy
- 1.5% over Line, Load, and Temperature
Fast Transient Response
Adjustable Output Voltage by External
Resistors
Power-On-Reset Monitoring on both VCNTL
and VIN Pins
Internal Soft-Start
Current-Limit Protection
Under-Voltage Protection
Thermal Shutdown with Hysteresis
Power-OK Output with a Delay Time
Shutdown for Standby or Suspend Mode
Simple SOP-8P Package with Exposed Pad
Lead Free and Green Devices Available
ANPEC Electronics Corp.
0.8V Reference Ultra Low Dropout (0.2V@1.5A) Linear Regulator
1
General Description
The APL5915 is a 1.5A ultra low dropout linear
regulator. This product is specifically designed to pro-
vide well supply volatage for motherboards NB and VGA
card applications. The IC needs two supply voltages,
a control voltage for the circuitry and a main supply
voltage for power conversion, to reduce power dissi-
pation and provide extremely low dropout.
The APL5915 integrates many functions into a single
package. A Power-On-Reset (POR) circuit monitors
both supply voltages to prevent wrong operations. Ther-
mal shutdown and current limit functions protect the
device against thermal and current over-loads. POK
indicates the output status with time delay which is
set internally. It can control other converter for power
sequence. The APL5915 is enabled by other power
system. Pulling and holding the EN pin below 0.3V to
shuts off the output.
The APL5915 is available in SOP-8P package which
features small size as SOP-8 and an Exposed Pad to
reduce the junction-to-case resistance, being appli-
cable in 1~2W applications.
Pin Configuration
(connected to V
= Exposed Pad
VOUT
VOUT
GND
SOP-8P (Top View)
FB
IN
1
2
3
4
plane for better heat dissipation)
VIN
8
7
6
5
EN
POK
VCNTL
VIN
www.anpec.com.tw

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APL5915 Summary of contents

Page 1

... Copyright ANPEC Electronics Corp. Rev. A.3 - Apr., 2008 General Description The APL5915 is a 1.5A ultra low dropout linear regulator. This product is specifically designed to pro- vide well supply volatage for motherboards NB and VGA card applications. The IC needs two supply voltages, a control voltage for the circuitry and a main supply voltage for power conversion, to reduce power dissi- pation and provide extremely low dropout ...

Page 2

... Ordering and Marking Information APL5915 APL5915 APL5915 KA : XXXXX Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “ ...

Page 3

... CNTL 1 F VCNTL 5 7 VIN POK 3 VOUT 4 VOUT APL5915 GND CNTL 1 F VCNTL 5 7 VIN POK 3 VOUT 4 VOUT APL5915 GND R2 78K 22 F ECJ3YBOJ226M Panasonic 22 F GRM21BR60J226M Murata 137.6 27 30. CNTL + +1. OUT +1 ...

Page 4

... APL5915 Absolute Maximum Ratings Symbol V VCNTL Supply Voltage (VCNTL to GND) CNTL V VIN Supply Voltage (VIN to GND and FB to GND V I/O POK to GND V POK Power Dissipation Junction Temperature J T Storage Temperature STG T Maximum Lead Soldering Temperature, 10 Seconds SDR Thermal Characteristics Symbol ...

Page 5

... CNTL 2. -40~125 C OUT =5V CNTL =5V -40 ~ 125 C CNTL J Rising J V Falling FB V Rising EN EN=GND V Rising FB V Falling FB POK sinks 5mA 5 = 1.5V 1.2V and T = -40 IN OUT A APL5915 Unit Min Typ Max 0 180 380 A 2.7 2.9 3.1 V 0.4 V 0.8 0.9 1.0 0.5 V 0.8 V -1.5 +1.5 % -0.13 0.13 %/V 0.06 0.15 % 0.12 0.18 V 0.17 0.23 0.25 V 0.3 2.1 2.8 3 ...

Page 6

... APL5915 Typical Operating Characteristics VCNTL Supply Current vs. Junction Temperature 1.0 0.9 V =5V CNTL 0.8 0.7 0.6 0.5 V =3.3V CNTL 0.4 0.3 0.2 0.1 0.0 -50 - Junction Temperature ( C) Reference Voltage vs. Junction Temperature 0.808 0.806 0.804 0.802 0.800 0.798 0.796 0.794 0.792 -50 - Junction Temperature ( C) Copyright ANPEC Electronics Corp. Rev. A.3 - Apr., 2008 50 75 ...

Page 7

... APL5915 Typical Operating Characteristics (Cont.) VCNTL PSRR vs. Frequency CNTL CNTL CNTL -10 - 200mV = 200mV = 200mV CNTL CNTL CNTL PK-PK PK-PK PK- 1.5V = 1. -20 - OUT OUT OUT 1.2V = 1.2V = 1.2V -30 -30 OUT OUT OUT ...

Page 8

... APM2014N L2 3.3 H +1. 1000 F x2 APM2014N R5 1.75K Enable 0 + CNTL +5V C VCNTL 1 F VCNTL POK VIN VOUT VOUT U1 APL5915 GND 33nF www.anpec.com.tw POK VOUT +1.2V/1.5A C OUT 150 F ...

Page 9

... APL5915 Operating Waveforms (Cont.) 1. Load Transient Response : Using an Output Capacitor with ESR 18m 1 150 F/6.3V (ESR = 30m ), C OUT - I = 10mA to 1.5A to 10mA, Rise time = Fall time = 1 s OUT I = 10mA ->1.5A OUT OUT OUT OUT OUT OUT OUT Ch1 : V , 50mV/Div OUT Ch2 : I , 500mA/Div ...

Page 10

... APL5915 Operating Waveforms (Cont.) 2. Power ON and Power OFF : - V = 1.5V 5V,V IN CNTL OUT - F/6.3V (ESR = 3m OUT Power ON Power OUT OUT OUT POK POK POK CNTL CNTL CNTL Ch1 : V , 1V/div IN Ch2 : V , 1V/div OUT Ch3 : V , 1V/div POK Ch4 : V ...

Page 11

... APL5915 Operating Waveforms (Cont.) 4. POK Delay : - V = 1.5V 5V,V IN CNTL OUT - F/6.3V (ESR = 3m OUT OUT OUT OUT POK POK POK Ch1 : V , 1V/div IN Ch2 : V , 1V/div OUT Ch3 : V , 1V/div POK Time : 1ms/div Copyright ANPEC Electronics Corp. Rev. A.3 - Apr., 2008 = 1. F/6.3V ...

Page 12

... APL5915 Functional Pin Description GND (Pin 1) Ground pin of the circuitry. All voltage levels are measured with respect to this pin. FB (Pin 2) Connecting this pin to an external resistor divider receives the feedback voltage of the regulator. The output voltage set by the resistor divider is determined ...

Page 13

... For normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed +125°C. Enable Control The APL5915 has a dedicated enable pin (EN). A logic low signal (V < 0.3V) applied to this pin shuts down EN the output. Following a shutdown, a logic high signal re-enables the output through initiation of a new softstart cycle ...

Page 14

... During load transients, the output capacitors, depending on the stepping amplitude and slew rate of load current, are used to reduce the slew rate of the current seen by the APL5915 and help the device to minimize the variations of output voltage for good transient response. For the applications with large stepping load current, the low-ESR bulk capacitors are normally recommended ...

Page 15

... (7) (See Next Page Figure 2) R1 Connect the one pin of the R2 to the GND of APL5915 - Connect the one pin the Pin 3 of APL5915 - Connect the one pin the Pin 3 of APL5915 ESR (8) OUT 15 can not meet the equation (8), (calculated) www ...

Page 16

... APL5915 Application Information (Cont.) PCB Layout Consideration (Cont.) V CNTL C CNTL VCNTL VIN APL5915 VOUT VOUT C1 FB GND R2 Figure 2 Thermal Consideration See Figure 3. The SOP- cost-effective package featuring a small size like a standard SOP-8 and a bottom exposed pad to minimize the thermal resistance of the package, being applicable to high current applications ...

Page 17

... APL5915 Package Information SOP- THERMAL PAD MIN 0.00 A2 1.25 b 0.31 c 0.17 D 4.80 D1 2.25 E 5.80 E1 3.80 E2 2. Note : 1. Follow JEDEC MS-012 BA. Copyright ANPEC Electronics Corp. Rev. A.3 - Apr., 2008 SOP-8P MILLIMETERS MAX. 1.60 0.15 0.51 0.25 5.00 3.50 6.20 4.00 3.00 1.27 BSC 0.50 1. Dimension "D" does not include mold flash, protrusions or gate burrs ...

Page 18

... APL5915 Carrier Tape & Reel Dimensions K0 SECTION A-A Application A H 330.0± 50 MIN. 2.00 SOP-8( 4.0± 0.10 8.0± 0.10 Devices Per Unit Package Type SOP- 8P Copyright ANPEC Electronics Corp. Rev. A.3 - Apr., 2008 P0 P2 OD0 A0 B SECTION B 12.4+2.00 13.0+0.50 1.5 MIN. 20.2 MIN. 12.0± 0.30 1.75± 0.10 -0.00 -0. 1.5+0.10 2.0± 0.05 1 ...

Page 19

... APL5915 Reflow Condition Tsmax Tsmin 25 Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Classification Reflow Profiles Profile Feature Average ramp-up rate ( Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: ...

Page 20

... APL5915 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures Package Thickness <2.5 mm 2.5 mm Table 2. Pb-free Process – Package Classification Reflow Temperatures Package Thickness <1.6 mm 1.6 mm – 2.5 mm 2.5 mm *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 C ...

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