AN214 Philips, AN214 Datasheet - Page 7

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AN214

Manufacturer Part Number
AN214
Description
74F Extended Octal-Plus Family Applications
Manufacturer
Philips
Datasheet

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*
** Worst case power, T
Philips Semiconductors
Table 2. Parity Bus Family versus the Competition
NOTES:
74F821–74F863 Series
The 74F821 through 74F863 Series of Octal 9-bit and 10-bit Buffers,
Latch Buffers, Register Buffers and Transceivers are standardized
around the AMD 298XX series with one significant difference—the
Philips Semiconductors “Light-Load” NPN input offers a 50:1
reduction in input loading (1000 A vs. 20 A). This series illustrates
the standardized on 24-pin/300mil-wide Slim-DIP packages,
“broadside” input/output pinouts and control function pins. All
74F8XX 3-State outputs are guaranteed to source/sink
–15mA/64mA, except for the 74F84X Latched Buffers, which are
specified at –15mA/48mA.
The logic diagram and pin configurations of the 74F828
Non-Inverting 10-bit Buffer (Figure 1) and the 74F821–826 and
74F841–846 Registered/Latched Buffers (Figure 4) are excellent
illustrations of the standardized pin configuration illustrating
“broadside” chip design.
Figure 5 shows the pinouts of the 74F827/828 buffers and
74F861–864 Transceivers. There currently are no 9-bit buffer
offerings in this series.
June 1988
74F240/F244 + 74F280
74F240/F244 + 74F280
74F240/F245 + 74F280
74F extended octal-plus family applications
Propagation delays of DATA IN-to-DATA OUT and IN-to-PARITY OUT, T
Output Load = C
OEAB OEBA CPAB CPBA SAB SBA
PART NUMBER
74F655A/F656A
L
+ 1 AND gate
74F455/F456
REAL TIME BUS TRANSFER
BUS A
74F657
L
vs
vs.
vs
vs.
vs.
BUS B TO BUS A
X
L
Figure 8. 74F651A–654A Registered Transceivers Storage Options (74F646A–649A not shown)
= 50pF, and R
X
amb
BUS B
X
= 0 C to 70 C, V
Octal Parity Buffer
Octal Parity Buffer
Octal Parity Buffer
Octal Parity Buffer
Octal Parity Transceiver
Octal Parity Transceiver
L
DESCRIPTION
L
= 500 .
OEAB OEBA CPAB CPBA SAB SBA
H
REAL TIME BUS TRANSFER
BUS A
CC
H
BUS A TO BUS B
= +5.0V 10%, Output Load = C
X
X
TOTAL #
OF PINS
BUS B
24
38
24
38
24
38
L
X
7
IN to OUT
t
OEAB OEBA CPAB CPBA SAB SBA
PDmax
7.5ns
7.5ns
7.5ns
7.5ns
7.5ns
8.0ns
X
L
L
amb
Registered Transceiver Series
the 74F646A–649A and 74F651A–654A Octal Dual-Registered
Transceivers offer a “Light-Load” combination of a 74F245 type
transceiver with two 74F373/374 type octal registers within a 24-pin
Slim-DIP broadside input/output package. This series offers a
significant 6:1 package count reduction advantage over older
technologies.
Figure 6 shows the 74F646A and 74F651A Transceivers Simplified
Block Diagrams, and this series’ pin configurations are depicted in
Figure 7. Figure 8 graphically illustrates four optional storage and
transfer modes of the 74F651A Octal, Non-Inverting, 3-State,
Dual-Registered Transceiver. The 74F654A will be used to explain
the operation of the entire series. The 74F646A/648A (3-State,
INV/NINV) and the 74F647/649 (O.C., INV/NINV) Octal
Dual-Registered Transceivers offer optional signal direction control
logic and output enable to the 74F651A–654A series.
This series allows you to store or real-time transfer data in either
direction through the transceiver function. Data at the A
stored in either the A
BUS A
= 0 C to 70 C, V
*
H
H
X
A, B, OR A AND B
STORAGE FROM
L
= 50pF, and R
IN to PARITY
X
t
16.0ns
14.5ns
16.0ns
14.5ns
16.0ns
14.5ns
PDmax
X
BUS B
*
X
X
X
CC
N
L
port register or the B
= 500 .
= +5.0V 10%,
X
X
X
I
CCmax
110mA
125mA
110mA
125mA
110mA
125mA
OEAB OEBA CPAB CPBA SAB SBA
H
**
TRANSFER STORED DATA
BUS A
L
TO A AND/OR B
POWER
Center
Corner
Corner
Corner
Center
Corner
PINS
H or L H or L H
N
register and, then, can
Application note
BUS B
BROADSIDE
AN214
SF00409
N
DESIGN
port can be
Yes
Yes
Yes
No
No
No
H

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