AN178 Philips, AN178 Datasheet - Page 7

• Manufacturer Part Number: AN178
• Description: Modeling the PLL
• Manufacturer: Philips

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Philips Semiconductors
First-Order Filter
With the addition of a single-pole low-pass filter F(s) of the form
where 1 = R
root locus shown in Figure 6b. Again, an open-loop pole is located
at the origin because of the integrating action of the VCO. Another
open-loop pole is positioned on the real axis at -1/
time constant of the low-pass filter.
One can make the following observations from the root locus
characteristics of Figure 6b:
a. As the loop gain K
b. If the filter time constant is increased, the real part of the
As in any practical feedback system, excess shifts or non-dominant
poles associated with the blocks within the PLL can cause the root
loci to bend toward the right half plane as shown by the dashed line
in Figure 6b. This is likely to happen if either the loop gain or the
filter time constant is too large and may cause the loop to break into
sustained oscillations.
First-Order Lag-Lead Filter
The stability problem can be eliminated by using a lag-lead type of
filter, as indicated in Figure 6c. This type of a filter has the transfer
lock range. For the simple first-order lag filter function
where
filter confines the root locus to the left half-plane and ensures
stability. The lag-lead filter gives a frequency response dependent
on the damping, which can now be controlled by the proper
adjustment of
because it allows the loop to be used with a response between that
of the firstand second-order loops and it provides an additional
control over the loop transient response. If R
as a second-order loop and as R
first-order loop due to a pole-zero cancellation. However, as
first-order operation is approached, the noise bandwidth increases
and interference rejection decreases since the high frequency error
components in the loop are now attenuated to a lesser degree.
Second- and Higher-Order Filters
Second- and higher-order filters, as well as active filters,
occasionally are designed and incorporated within the PLL to
achieve a particular response not possible or easily obtained with
zero or first-order filters. Adding more poles and more gain to the
closedloop transfer function reduces the inherent stability of the
loop. Thus the designer must exercise extreme care and utilize
complex stability analysis if second-order (and higher) filters or
active filters are to be considered.
1988 Dec
4
U
Modeling the PLL
imaginary part of the closed-loop poles increases: thus, the
natural frequency of the loop increases and the loop becomes
more and more under-damped.
closed-loop poles becomes smaller and the loop damping is
reduced.
F(s)
F(s)
.com
2
= R
2
1
1
1
C and
C
1
1
1
and
, the PLL becomes a second-order system with the
1
(tau
1
s
v
1
2
1
increases for a given choice of
. In practice, this type of filter is important
= R
2
s
1
C. By proper choice of R
2
)s
2
, the loop behaves as a
2
= 0, the loop behaves
1
where
2
, this type of
1
, the
1
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is the
(21)
(22)
7
Note that at all times the capture range is smaller than the lock rage.
CALCULATING LOCK AND CAPTURE RANGES
In terms of the basic gain expression in the and system, the lock
range of the PLL
loop gain (2-sided lock range).
where F(O) is the value of the low-pass filters transfer function at
DC.
Since the capture range
readily derived as the lock range. However, an approximate
expression for the capture range can be wrinen as (2-sided capture
range).
where F(i
evaluated at
and error” process since the capture range is a function of itself.
For the simple first-order lag filter of Figure 6b, the capture range
can be approximated as
This approximation is valid for
Equations 23 and 24 show that the capture range increases as the
low-pass filter time constant is decreased, whereas the lock range is
unaffected by the filter and is determined solely by the loop gain.
2
2
2
1
Figure 7. Typical PLL Frequency-to-Voltage Transfer
L
C
c
2
C
1
2
) is the magnitude of the low-pass filter transfer function
4 f
L
4 f
C
. Solution of Equation 24 frequently involves a “trial
L
C
1
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L
L
can be shown to be numerically equal to the DC
K
K
V
V
2
F(0)
| F(i
C
Characteristics
denotes a transient condition, it is not as
K
1
V
C
) |
Application note
AN178
SL01017
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