AN114 Xicor, AN114 Datasheet - Page 3

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AN114

Manufacturer Part Number
AN114
Description
Interfacing the X9408/X9418 XDCP to 8051 Microcontrollers
Manufacturer
Xicor
Datasheet

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; This code give the flexibility to communicate with up to 16 different X9408
; devices on the same bus. It does this by using a register, named "ADDR_BYTE".
; This register is loaded with the specific slave address and address of the
; desired X9408 device. The register can be saved if there is only one X9408
; on the bus, by making ADDR_BYTE a constant.
;
; An 80C51 register is used to identify the particular X9408 register or DCP, or both,
; are used for a particular operation. There are various constants available for
; easy selection of the WCR and DR combination. The contents of the register
; is appended to the specific instruction in the "instr_gen' routine.
;
; A register is used as a counter for keeping track of the number of bits sent
; in each byte.
; A register is used for the increment/decrement instruction to specify up or
; down movement of the wiper. For each command, the master loads the "PULSES"
; register with a direction bit and 6 bits of count. If the MSB is a 1
; the wiper increments the specified number of tap positions. If the MSB
; is a 0 the wiper decrements the specified number of tap positions.
;
; A register is used to hold the specific command being executed. This allows
; the instruction to be built up and sent to the X9408.
;
; In the MAIN section are sample main code segments showing how to use the
; various subroutines.
;
; This code was tested on a Cygnal 80C51 microcontroller, using the Cygnal
; tools. The specific routines required to set up the Cygnal processor
; are identified and are probably not needed for other standard 8051 devices.
; Since each 8051 may have specific requirements that are not handled in this
; code, the programmer is advised to check the setup needs of the specific
; 80C51 derivation that is being used.
;
;-----------------------------------------------------------------------------
; I/O Definition
;-----------------------------------------------------------------------------
SCL
SDA
;-----------------------------------------------------------------------------
; Register Definition
;-----------------------------------------------------------------------------
$include (c8051f000.inc); Include regsiter definition file (Cygnal).
TEMP
COUNT
PULSES
COMMAND
ID
ADDR_BYTE
DATA_BYTE
;-----------------------------------------------------------------------------
; Constant Definition
;-----------------------------------------------------------------------------
SLAVE_ADR0
SLAVE_ADR1
SLAVE_ADR2
SLAVE_ADR3
SLAVE_ADR4
SLAVE_ADR5
SLAVE_ADR6
REV 1.1 11/12/02
bit
bit
equ
equ
equ
equ
equ
equ
equ
equ
equ
equ
equ
equ
equ
equ
p1.0
p1.1
r1
r2
r3
r4
r5
r6
r7
050h
051h
052h
053h
054h
055h
056h
; 80C51 pin used AS SCL
; 80C51 pin used AS SDA
; Scratch register
; Loop counting register
; Bits -> DIR 0 ###### (#=pulses = 0 to 64)
; Instruction (I.E. 0,4,8,12,16,...)
; Bits -> 0 0 0 0 R1 R0 P1 P0
; Bits -> 0 1 0 1 A3 A2 A1 A0
; Bits -> CM DW D5 D4 D3 D2 D1 D0
Application Note
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