PIC16CE625-20/JW Microchip Technology, PIC16CE625-20/JW Datasheet - Page 67
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PIC16CE625-20/JW
Manufacturer Part Number
PIC16CE625-20/JW
Description
OTP 8-Bit CMOS MCU with EEPROM Data Memory
Manufacturer
Microchip Technology
Datasheet
1.PIC16CE625-20JW.pdf
(189 pages)
- Current page: 67 of 189
- Download datasheet (2Mb)
The SS pin allows a synchronous slave mode. The
SPI must be in slave mode (SSPCON<3:0> = 04h)
and the TRISA<5> bit must be set for the synchro-
nous slave mode to be enabled. When the SS pin is
low, transmission and reception are enabled and the
SDO pin is driven. When the SS pin goes high, the
SDO pin is no longer driven, even if in the middle of
a transmitted byte, and becomes a floating output.
External pull-up/ pull-down resistors may be desirable,
depending on the application.
FIGURE 11-5: SPI MODE TIMING, MASTER MODE
FIGURE 11-6: SPI MODE TIMING (SLAVE MODE WITH CKE = 0)
SCK (CKP = 0,
SCK (CKP = 0,
SCK (CKP = 1,
SCK (CKP = 1,
SDO
SDI (SMP = 0)
SCK (CKP = 0)
SCK (CKP = 1)
1997 Microchip Technology Inc.
SDI (SMP = 1)
SDO
SDI (SMP = 0)
SSPIF
SS (optional)
SSPIF
CKE = 0)
CKE = 1)
CKE = 0)
CKE = 1)
bit7
bit7
bit7
bit7
bit7
bit6
bit6
bit5
bit5
bit4
bit4
To emulate two-wire communication, the SDO pin can
be connected to the SDI pin. When the SPI needs to
operate as a receiver the SDO pin can be configured as
an input. This disables transmissions from the SDO.
The SDI can always be left as an input (SDI function)
since it cannot create a bus conflict.
Note:
Note:
bit3
bit3
When the SPI is in Slave Mode with SS pin
control enabled, (SSPCON<3:0> = 0100)
the SPI module will reset if the SS pin is set
to V
If the SPI is used in Slave Mode with
CKE = '1', then the SS pin control must be
enabled.
DD
.
bit2
bit2
PIC16C9XX
bit1
bit1
DS30444E - page 67
bit0
bit0
bit0
bit0
bit0
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