ISL78100 Intersil Corporation, ISL78100 Datasheet - Page 9

• Manufacturer Part Number: ISL78100
• Manufacturer: Intersil Corporation

Pin Descriptions
PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
BUCK/BOOSTN Tie to GND for BOOST operation and to VDC for Buck operation
EN/PWM
LEVEL
MODE
FAULT
NAME
SWD1
SWD2
SWS2
SWS1
TEMP
TMAX
VBAT
GND
VDC
OVP
ENL
VHI
VIN
NC
FB
9
Internally regulated 5V supply, tracks V
external supply if V
Power FET gate drive supply. Can be biased with external supply if V
Overvoltage monitor input; tie to VOUT for normal operation
NMOS power FET drain
NMOS power FET drain
Sets LED bias current level; VFB(nominal) = VLEVEL/5
Temperature reference, tie to GND to disable temperature compensation
LED current feedback
Maximum LED temperature set point; if TEMP voltage exceeds TMAX, FB set point will be reduced
NMOS power FET source
NMOS power FET source
Chip enable and light modulation PWM dimming input
Digital Input; tie to GND to set FB reference to 400mV, tie to VDC to control FB reference with LEVEL input
LED load isolation MOS gate driver
Input supply monitor
Leave floating (internally connected)
Ground return and FB ground reference
Gate drive of fault protection FET. Driven low under fault conditions
Input supply
IN
is <5.5V. A minimum of 3.3µF decoupling capacitor is needed in this pin.
ISL78100
IN
for input voltages less than 5V. LDO output can also be biased with
DESCRIPTION
IN
is <5.5V
December 17, 2007
FN6626.0