DS3904 Maxim Integrated Products, DS3904 Datasheet - Page 9

• Manufacturer Part Number: DS3904
• Description: DS3904, DS3905 Triple, 128-Position, Nonvolatile, Variable, Digital Resistor/switch
• Manufacturer: Maxim Integrated Products

Figure 2. 2-Wire Data Transfer Protocol
Figure 3. 2-Wire AC Characteristics
The following bus protocol has been defined:
Accordingly, the following bus conditions have been
defined:
SDA
SCL
SDA
SCL
Data transfer can be initiated only when the bus is
not busy.
During data transfer, the data line must remain sta-
ble whenever the clock line is high. Changes in the
data line while the clock line is high are interpreted
as control signals.
CONDITION
START
STOP
t
BUF
MSB
START
1
Triple 128-Position Nonvolatile Digital
2
t
HD:STA
SLAVE ADDRESS
t
LOW
6
_____________________________________________________________________
t
R
t
HD:DAT
7
DIRECTION
t
F
R/W
BIT
t
8
HIGH
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
t
SU:DAT
ACK
Variable Resistor/Switch
9
REPEATED
Bus Not Busy: Both data and clock lines remain
high.
Start Data Transfer: A change in the state of the
data line from high to low while the clock is high
defines a start condition.
Stop Data Transfer: A change in the state of the
data line from low to high while the clock line is
high defines the stop condition.
Data Valid: The state of the data line represents
valid data when, after a start condition, the data line
is stable for the duration of the high period of the
clock signal. The data on the line can be changed
during the low period of the clock signal. There is
START
1
t
SU:STA
t
2
HD:STA
REPEATED IF MORE BYTES
ARE TRANSFERRED
3–7
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
8
ACK
9
t
SP
OR REPEATED
CONDITION
CONDITION
t
SU:STO
START
STOP
9