DS3514 Maxim Integrated Products, DS3514 Datasheet
DS3514
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DS3514 Summary of contents
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... Rev 1; 10/ Gamma and V General Description The DS3514 is a programmable gamma and V age generator that supports both real-time updating as well as multibyte storage of gamma/V chip EEPROM memory. An independent 10-bit DAC, two 10-bit data registers, and four words of EEPROM memo- ry are provided for each individually addressable gamma or V channel ...
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I C Gamma and V ABSOLUTE MAXIMUM RATINGS Voltage Range on V Relative to GND ................-0.5V to +16V DD Voltage Range on VRL, VRH, GHH, GHM, GLM, GLL Relative to GND.........-0. 0.5V), not to exceed 16V ...
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I C Gamma and V INPUT ELECTRICAL CHARACTERISTICS (continued +2.7V to +5.5V -45°C to +95°C, unless otherwise noted PARAMETER SYMBOL Input Resistance (GHH, GHM, GLM, GLL) Input Resistance Tolerance Power-On Recall Voltage Power-Up ...
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I C Gamma and ELECTRICAL CHARACTERISTICS (V = +2.7V to +5.5V -45°C to +95°C, timing referenced PARAMETER SYMBOL SCL Clock Frequency Bus-Free Time between STOP and START Conditions Hold ...
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... SYMBOL EEPROM Write Cycles Note 1: All voltages are referenced to ground. Currents entering the IC are specified positive and currents exiting the IC are negative. Note less than +2. left unconnected, the DS3514 pulls the devices on the I C bus. Note 3: I supply current is specified with V ...
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I C Gamma and S0/ GM1–G14 Figure 2. GM1–GM14 Settling Timing Diagram V S0/ GM1–GM14 Figure 3. ...
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I C Gamma and +5.0V +15V +25°C, unless otherwise noted DIGITAL SUPPLY STANDBY CURRENT vs SDA = SCL = ...
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I C Gamma and +5.0V +15V +25°C, unless otherwise noted INL 0.50 0.25 0 -0.25 -0.50 0 128 256 384 512 640 768 896 1024 GAMMA SETTING (DEC) ...
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... Reference for Low-Voltage Gamma DAC Reference for High-Voltage Gamma DAC Reference for High-Voltage Gamma DAC V Analog Output. This output requires a 1μF capacitor to GND. COM Address Input. This pin determines the DS3514’s I Ground. Exposed Pad. Connect to GND. Pin Description 2 C slave address. 9 ...
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... I C Gamma and V DS3514 SDA SCL I C INTERFACE A0 MODE0 BIT (CR.0) MODE1 BIT (CR.1) S0 LOGIC S1 AND S0/S1 PINS LD CONTROL S0/S1 BITS (SOFT S0/S1) LD VCAP COMPENSATION COMP GND 10 ______________________________________________________________________________________ Buffer with EEPROM COM BANKS GM14 BANK A GM14 BANK B MUX GM14 BANK C ...
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... I C Gamma and V Detailed Description The DS3514 operates in one of three modes that deter- mine how the V and gamma DACs are COM controlled/updated. The first two modes allow “banked” control of the 14 gamma channels and one V nel. Depending on the mode, one of four banks (in EEPROM) can be selected using either the S0/S1 pins or using the SOFT S0/S1 bits in the Soft S0/S1 register ...
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... I The DS3514 continues to respond to I and thus draws some current from occurring. When the I rent drawn from the safety feature, the DS3514 goes into a thermal shutdown state if the junction temperature ever reaches GLL channel’s digital poten- COM ...
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... Slave Address Byte and Address Pin The slave address byte consists of a 7-bit slave address plus a R/W bit (see Figure 5). The DS3514’s slave address is determined by the state of the A0 pin. This pin allows up to two devices to reside on the same ...
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I C Gamma and V ADDRESS NAME (HEX) Latch A for GM13 Ch 1Ah, 1Bh Latch A for GM14 Ch 1Ch, 1Dh Reserved 1Eh–3Fh Soft S1/S0 40h Standby 41h Reserved 42h–47h Control 48h Reserved 49h Status Bits 4Ah Reserved ...
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I C Gamma and V Soft S0/S1 Register 40h: SOFT S1/S0 Bits FACTORY DEFAULT MEMORY TYPE 40h x x BIT 7 Bits 7:2 Reserved These bits are used when in SOFT S0/S1 Bit-Controlled Bank-Updating mode (MODE1 = 0, MODE0 ...
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... Bits 3:2 Reserved DS3514 Mode (MODE[1:0]): 00 = S0/S1 pins are used to select the desired bank (A–D) (default). Bits 1 SOFT S0/S1 (bits) are used to select the desired bank (A–D Latch A is used to control the DACs. Status Bits Register 4Ah: Real-Time Indicator of Logic State on LD, S1, and S0 Pins ...
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... I communication until the next START condition is sent. Memory address: During an I the DS3514, the master must transmit a memory address to identify the memory location where the slave is to store the data. The memory address is always the second byte transmitted during a write operation following the slave address byte ...
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... START condition, writes the slave address byte (R/W = 0), writes the memory address, writes data bytes, and generates a STOP condition. The DS3514 can write bytes (one page or row single write transaction. This is internally controlled by an address counter that allows data to be written to consecutive addresses without transmitting a memory address before each data byte is sent ...
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... Figure Communication Examples Applications Information Power-Supply Decoupling To achieve the best results when using the DS3514, decouple all the power-supply pins (V a 0.01µF or 0.1µF capacitor. Use a high-quality ceramic surface-mount capacitor if possible. Surface-mount components minimize lead inductance, which improves performance, and ceramic capacitors tend to have adequate high-frequency response for decoupling applications ...
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... V GHH GHM GLM GLL DD V GM1 CC GM2 GM3 GM4 GM5 SCL GM6 GM7 DS3514 SDA S0 GM8 GM9 S1 GM10 LD GM11 GM12 A0 GM13 GND GM14 VRH VRL V COM 13V 2V For the latest package outline information and land patterns www.maxim-ic.com/packages. ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 © 2008 Maxim Integrated Products ...