PIC16C745/P Microchip Technology, PIC16C745/P Datasheet - Page 20
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PIC16C745/P
Manufacturer Part Number
PIC16C745/P
Description
8-Bit CMOS Microcontrollers with USB
Manufacturer
Microchip Technology
Datasheet
1.PIC16C745P.pdf
(158 pages)
- Current page: 20 of 158
- Download datasheet (3Mb)
PIC16C745/765
TABLE 4-1:
DS41124A-page 20
Address
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
18Ch-
18Fh
190h
191h
192h
193h
194h
195h
196h
197h
198h
199h
19Ah
19Bh-
19Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as ’0’.
Note 1:
Bank 3
2: Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset.
3: These registers can be addressed from either bank.
4: The Parallel Slave Port (PORTD and PORTE) is not implemented on the PIC16C745, always maintain these bits clear.
OPTION_REG
INDF
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
UIR
UIE
UEIR
UEIE
USTAT
UCTRL
UADDR
USWSTAT
UEP0
UEP1
UEP2
Reserved
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose contents
are transferred to the upper byte of the program counter.
Name
(3)
(3)
—
—
—
—
—
(3)
(3)
(1,3)
(3)
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter’s (PC) Least Significant Byte
Indirect data memory address pointer
Unimplemented
PORTB Data Direction Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Reserved, do not use.
BTS_ERR OWN_ERR WRT_ERR
BTS_ERR OWN_ERR WRT_ERR
SWSTAT7
RBPU
Bit 7
GIE
IRP
—
—
—
—
—
—
—
—
—
SWSTAT6
INTEDG
ADDR6
Bit 6
PEIE
RP1
—
—
—
—
—
—
—
—
SWSTAT5
ADDR5
STALL
STALL
T0CS
Bit 5
T0IE
SEO
RP0
—
—
—
—
—
Advanced Information
Write Buffer for the upper 5 bits of the Program Counter
BTO_ERR
BTO_ERR
SWSTAT4
PKT_DIS
ENDP1
ADDR4
UIDLE
UIDLE
T0SE
INTE
Bit 4
TO
—
—
—
EP_CTL_DIS EP_OUT_EN EP_IN_EN EP_STALL ---- 0000 ---- 0000
EP_CTL_DIS EP_OUT_EN EP_IN_EN EP_STALL ---- 0000 ---- 0000
EP_CTL_DIS EP_OUT_EN EP_IN_EN EP_STALL ---- 0000 ---- 0000
TOK_DNE
TOK_DNE
DEV_ATT
SWSTAT3
ENDP0
ADDR3
DFN8
DFN8
RBIE
Bit 3
PSA
PD
ACTIVITY
ACTIVITY
SWSTAT2
RESUME
CRC16
CRC16
ADDR2
Bit 2
T0IF
PS2
IN
Z
SWSTAT1
SUSPND
ADDR1
UERR
UERR
CRC5
CRC5
Bit 1
INTF
PS1
DC
—
1999 Microchip Technology Inc.
USB_RST --00 0000 --00 0000
USB_RST --00 0000 --00 0000
SWSTAT0 0000 0000 0000 0000
PID_ERR 0000 0000 0000 0000
PID_ERR 0000 0000 0000 0000
ADDR0
RBIF
Bit 0
PS0
—
—
C
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
---0 0000 ---0 0000
0000 000x 0000 000u
---x xx-- ---u uu--
--x0 000- --xq qqq-
-000 0000 -000 0000
0000 0000 0000 0000
Value on:
POR,
BOR
—
—
—
—
—
other resets
Value on all
(2)
—
—
—
—
—
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