R1610C RDC Semiconductor, R1610C Datasheet - Page 83

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R1610C

Manufacturer Part Number
R1610C
Description
High Performance 16 Bits MCU Integrated One 10/100M Mac Controller - 3.3V Operating Voltage/2.5V Core Voltage
Manufacturer
RDC Semiconductor
Datasheet
R
to be used by the programmer to hold data temporarily.
Data Sheet
Final Version 1.5
October 27, 2003
R
16.10
16.11
output frequency of the Baud Generator is 16 times the Baud [divisor # = (CPU frequency)/(baud rate*16)]. Two
8-bit latches store the divisor in a 16-bit binary format. These Divisor Latches must be loaded during initialization
to ensure proper operation of the Baud Generator. Upon loading either of the Divisor Latches, a 16-bit Baud
counter is immediately loaded.
Baud
Register Offset:
Register Name:
Reset Value
15
5
4
3
2
1
0
D
D
This 8-bit Read/Write Register does not control the UART in any way. It is intended as a scratchpad register
The UART contains a programmable Baud Generator that is divided by any divisor from 2 to 2
14
DDCD
DDSR
DCTS
TERI
DSR
CTS
C
Scratchpad Register
Programmable Baud Generator
C
13
®
®
:
R
R
I
CPUCLK=75MHz
I
S
S
C
C
R/W
R/W
R/W
R/W
R/W
R/W
8E
UART0 Scratch Register
──
D
D
12
S
S
P
P
C
C
o
o
m
m
m
m
u
u
11
n
n
Data Set Ready.
This bit is the complement of the Data Set Ready (DSR_n) input.
If bit 4 (Loop Bit) of the MCR is set to 1, this bit is equivalent to DTR in the MCR.
Clear To Send.
This bit is the complement of the Clear to Send (CTS_n) input.
If bit 4 (Loop Bit) of the MCR is set to 1, this bit is equivalent to RTS in the MCR.
Delta Data Carrier Detect.
This bit indicates that the DCD_n input has changed the state.
Note: Whenever bit 0, 1, 2 or 3 is set to logic 1, a MODEM Status Interrupt is
generated.
Trailing Edge Ring Indicator.
This bit indicates that the RI_n input has changed from a low to a high state.
Delta Data Set Ready.
This bit indicates that the DSR_n input has changed the state since the last time it
was read by the CPU.
Delta Clear To Send.
This bit indicates that the CTS_n input has changed the state since the last time it
was read by the CPU.
i
i
c
c
a
a
t
t
i
i
o
o
n
n
10
9
8
7
CPUCLK=100MHz
6
5
SCR [7:0]
4
Fast Ethernet RISC Processor
3
2
1
R1610C
0
16
-1.. The
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