74F623PC Fairchild Semiconductor, 74F623PC Datasheet
74F623PC
Specifications of 74F623PC
Related parts for 74F623PC
74F623PC Summary of contents
Page 1
... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74F623SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F623PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...
Page 2
Unit Loading/Fan Out Pin Names GBA, GAB A – – Functional Description The enable inputs GAB and GBA control whether data is transmitted from the A bus to the B bus or from the B ...
Page 3
Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...
Page 4
AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH t A Input to B Output (74F620) PHL t Propagation Delay PLH t B Input to A Output (74F620) PHL t Propagation Delay PLH t A Input to B Output (74F623) ...
Page 5
Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com ...
Page 6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...