74F125SJX Fairchild Semiconductor, 74F125SJX Datasheet

IC BUFFER TRI-ST QD N-INV 14SOP

74F125SJX

Manufacturer Part Number
74F125SJX
Description
IC BUFFER TRI-ST QD N-INV 14SOP
Manufacturer
Fairchild Semiconductor
Series
74Fr
Datasheets

Specifications of 74F125SJX

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
15mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (5.3mm Width), 14-SOP, 14-SOIJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2000 Fairchild Semiconductor Corporation
74F125SC
74F125SJ
74F125PC
74F125
Quad Buffer (3-STATE)
Features
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Unit Loading/Fan Out
Function Table
H
L
Z
X
Order Number
High impedance base inputs for reduced loading
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial
Package Number
IEEE/IEC
M14A
M14D
N14A
Pin Names
A
n
O
, B
n
n
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Description
A
H
L
L
Outputs
n
Inputs
DS009475
Inputs
600/106.6 (80)
B
H
X
L
HIGH/LOW
n
1.0/0.033
Connection Diagram
U.L.
Package Description
Output
O
H
Z
L
12 mA/64 mA (48 mA)
Output I
20 A/ 20 A
Input I
IH
OH
/I
/I
IL
OL
April 1988
Revised September 2000
www.fairchildsemi.com

Related parts for 74F125SJX

74F125SJX Summary of contents

Page 1

... Logic Symbol IEEE/IEC Unit Loading/Fan Out Pin Names Function Table H HIGH Voltage Level L LOW Voltage Level Z High Impedance X Immaterial © 2000 Fairchild Semiconductor Corporation Package Description Connection Diagram Input I U.L. Description Output I HIGH/LOW Inputs 1.0/0.033 Outputs 600/106.6 (80) 12 mA/64 mA (48 mA) Inputs Output ...

Page 2

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 3

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 3 www.fairchildsemi.com ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14D 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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