PIC16C63A Microchip Technology, PIC16C63A Datasheet - Page 144
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PIC16C63A
Manufacturer Part Number
PIC16C63A
Description
28/40-Pin 8-Bit CMOS Microcontrollers
Manufacturer
Microchip Technology
Datasheet
1.PIC16C63A.pdf
(152 pages)
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PIC16C63A/65B/73B/74B
Revision History ................................................................ 137
S
SEEVAL
SLEEP..................................................................... 81, 83, 93
Software Simulator (MPLAB-SIM)....................................... 99
Special Features of the CPU............................................... 81
Special Function Registers ........................................... 12, 13
Speed, Operating .......................................................... 1, 101
SPI (SSP Module)
SSP ..................................................................................... 51
SSPCON Register............................................................... 53
SSPSTAT Register ............................................................. 52
Stack ................................................................................... 23
STATUS Register.................................................... 13, 15, 91
T
T1CON Register............................................................ 13, 39
DS30605A-page 144
Timing Diagram......................................................... 110
Block Diagram............................................................. 54
Buffer Full Status (BF Bit) ........................................... 52
Clock Edge Select (CKE Bit)....................................... 52
Clock Polarity Select (CKP Bit) ................................... 53
Data Input Sample Phase (SMP Bit)........................... 52
Mode Select (SSPM3:SSPM0 Bits) ............................ 53
Receive Overflow Indicator (SSPOV Bit) .................... 53
Serial Clock (RC3/SCK/SCL)...................................... 54
Serial Data In (RC4/SDI/SDA) .................................... 54
Serial Data Out (RC5/SDO) ........................................ 54
Slave Select (RA5/SS/AN4)........................................ 54
Synchronous Serial Port Enable (SSPEN Bit) ............ 53
Enable (SSPIE Bit)...................................................... 18
Flag (SSPIF Bit) .......................................................... 19
RA5/SS/AN4 Pin ....................................................... 7, 8
RC3/SCK/SCL Pin .................................................... 7, 9
RC4/SDI/SDA Pin ..................................................... 7, 9
RC5/SDO Pin............................................................ 7, 9
RCSTA Register ......................................................... 13
SPBRG Register ......................................................... 14
SSPADD Register....................................................... 14
SSPBUF Register ....................................................... 13
SSPCON Register ................................................ 13, 53
SSPSTAT Register ............................................... 14, 52
TMR2 Output for Clock Shift ................................. 43, 44
TXSTA Register .......................................................... 14
Write Collision Detect (WCOL Bit) .............................. 53
CKP Bit ....................................................................... 53
SSPEN Bit................................................................... 53
SSPM3:SSPM0 Bits.................................................... 53
SSPOV Bit .................................................................. 53
WCOL Bit .................................................................... 53
BF Bit .......................................................................... 52
CKE Bit ....................................................................... 52
D/A Bit......................................................................... 52
P bit....................................................................... 52, 60
R/W Bit...................................................... 52, 57, 58, 59
S Bit ...................................................................... 52, 60
SMP Bit ....................................................................... 52
UA Bit.......................................................................... 52
C Bit ............................................................................ 15
DC Bit.......................................................................... 15
IRP Bit......................................................................... 15
PD Bit.................................................................... 15, 83
RP1:RP0 Bits .............................................................. 15
TO Bit .................................................................... 15, 83
Z Bit............................................................................. 15
T1CKPS1:T1CKPS0 Bits ............................................ 39
T1OSCEN Bit.............................................................. 39
T1SYNC Bit................................................................. 39
Evaluation and Programming System ............... 99
T2CON Register ........................................................... 13, 43
Timer0................................................................................. 37
Timer1................................................................................. 39
Timer2
Timing Diagrams
Timing Diagrams and Specifications ................................ 108
TMR1CS Bit................................................................ 39
TMR1ON Bit ............................................................... 39
T2CKPS1:T2CKPS0 Bits............................................ 43
TMR2ON Bit ............................................................... 43
TOUTPS3:TOUTPS0 Bits .......................................... 43
Block Diagram ............................................................ 37
Clock Source Edge Select (T0SE Bit) .................. 16, 37
Clock Source Select (T0CS Bit) ........................... 16, 37
Overflow Enable (T0IE Bit) ......................................... 17
Overflow Flag (T0IF Bit) ....................................... 17, 91
Overflow Interrupt ................................................. 38, 91
RA4/T0CKI Pin, External Clock ................................ 7, 8
Timing Diagram ........................................................ 111
TMR0 Register ........................................................... 13
Block Diagram ............................................................ 40
Capacitor Selection .................................................... 41
Clock Source Select (TMR1CS Bit) ............................ 39
External Clock Input Sync (T1SYNC Bit).................... 39
Module On/Off (TMR1ON Bit) .................................... 39
Oscillator............................................................... 39, 41
Oscillator Enable (T1OSCEN Bit) ............................... 39
Overflow Enable (TMR1IE Bit) ................................... 18
Overflow Flag (TMR1IF Bit) ........................................ 19
Overflow Interrupt ................................................. 39, 41
RC0/T1OSO/T1CKI Pin ............................................ 7, 9
RC1/T1OSI/CCP2 Pin .............................................. 7, 9
Special Event Trigger (CCP) ................................ 41, 47
T1CON Register ................................................... 13, 39
Timing Diagram ........................................................ 111
TMR1H Register ................................................... 13, 39
TMR1L Register ................................................... 13, 39
Block Diagram ............................................................ 44
PR2 Register .................................................. 14, 43, 48
SSP Clock Shift .................................................... 43, 44
T2CON Register ................................................... 13, 43
TMR2 Register ..................................................... 13, 43
TMR2 to PR2 Match Enable (TMR2IE Bit) ................. 18
TMR2 to PR2 Match Flag (TMR2IF Bit) ..................... 19
TMR2 to PR2 Match Interrupt......................... 43, 44, 48
I
Time-out Sequence on Power-up......................... 88, 89
USART Asynchronous Master Transmission ............. 67
USART Asynchronous Reception .............................. 68
USART Synchronous Reception ................................ 72
USART Synchronous Transmission ........................... 71
Wake-up from SLEEP via Interrupt ............................ 94
A/D Conversion ........................................................ 122
Brown-out Reset (BOR)............................................ 110
Capture/Compare/PWM (CCP) ................................ 112
CLKOUT and I/O ...................................................... 109
External Clock .......................................................... 108
I
I
Oscillator Start-up Timer (OST) ................................ 110
Parallel Slave Port (PSP) ......................................... 113
Power-up Timer (PWRT) .......................................... 110
Reset ........................................................................ 110
Timer0 and Timer1 ................................................... 111
USART Synchronous Receive
( Master/Slave) ......................................................... 120
USART SynchronousTransmission
2
2
2
C Reception (7-bit Address)..................................... 58
C Bus Data............................................................. 119
C Bus Start/Stop Bits ............................................. 118
1998 Microchip Technology Inc.