MD2200-DCC-V-T M-Systems Inc., MD2200-DCC-V-T Datasheet - Page 17

• Manufacturer Part Number: MD2200-DCC-V-T
• Description: Diskonchip 2000 Dip
• Manufacturer: M-Systems Inc.

7.4
The following section describes hardware design issues.
7.4.1 Wait State
Wait states can be implemented only when DiskOnChip 2000 is designed in a bus that supports a Wait state
insertion, and supplies a WAIT signal.
7.4.2 Big and Little Endian Systems
PowerPC, ARM, and other RISC processors can use either Big or Little Endian systems. DiskOnChip 2000 uses the
Little Endian system. Therefore, byte D[7:0] is its Least Significant Byte (LSB); bit D0 is the least significant bit
within that byte. When connecting the DiskOnChip to a device that supports the Big Endian system, make sure to
that the bytes of the CPU and the DiskOnChip match.
Note: Processors, such as the PowerPC, also change the bit ordering within the bytes. Failing to follow these rules
7.4.3
The TrueFFS driver supports 8-bit, 16-bit, and 32-bit bus architectures. Support for the 16-bit and 32-bit bus
architectures, typically used in RISC processors, can be achieved by using the LSB of the data bus as follows:
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Platform-Specific Issues
results in improper connection of the DiskOnChip and prevents the TrueFFS driver from identifying the
DiskOnChip.
Working with 8/16/32-Bit Systems
For 16-bit address boundary shifts, shift the address lines by one, so that the host address line A1 connects
to DiskOnChip 2000 address line A0, the host address line A2 connects to DiskOnChip 2000 line A1, and
so on.
For 32-bit address boundary shifts, shift the address lines by two, so that the host address line A2 connects
to DiskOnChip 2000 address line A0, the host address line A3 connects to DiskOnChip 2000 line A1, and
so on.
Data Sheet, Rev. 3.7
DiskOnChip 2000 DIP Data Sheet
91-SR-002-42-8L