MD2200-DCC-V-T M-Systems Inc., MD2200-DCC-V-T Datasheet - Page 16

• Manufacturer Part Number: MD2200-DCC-V-T
• Description: Diskonchip 2000 Dip
• Manufacturer: M-Systems Inc.

7.2
DiskOnChip 2000 uses an SRAM-like interface that can easily be connected to any microprocessor bus. With a
standard interface, it requires 13 address lines, 8 data lines and basic memory control signals (CE#, OE#, WE#), as
shown in Figure 7 below. Typically, DiskOnChip 2000 can be mapped to any free 8KB memory space. In a
PC-compatible platform, it is usually mapped into the BIOS expansion area. If the allocated memory window is
larger than 8KB, an automatic anti-aliasing mechanism prevents the firmware from being loaded more than once
during the ROM expansion search.
Notes: 1.
7.3
DiskOnChip 2000 uses standard SRAM-like control signals, which should be connected as follows:
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2.
System Interface
Connecting Signals
Address (A[12:0]) – Connect these signals to the host address bus.
Data (D[7:0]) – Connect these signals to the host data bus.
Write (WE#) and Output Enable (OE#) – Connect these signals to the host WR# and RD# signals,
respectively.
Chip Enable (CE#) – Connect this signal to the memory address decoder.
The 0.1µF and the 10nF low-inductance high-frequency capacitors must be attached to each of the
device’s VCC and VSS pins.
DiskOnChip 2000 is an edge-sensitive device. CE#, OE# and WE# should be properly terminated
(according to board layout, serial parallel or both terminations) to avoid signal ringing.
Output Enable
Write Enable
Chip Enable
Address
Data
Figure 7: DiskOnChip 2000 System Interface
A[12:0]
OE#
CE#
WE#
D[7:0]
Data Sheet, Rev. 3.7
DiskOnChip 2000
0.1 uF
VSS
10 nF
VCC
3.3V or 5V
DiskOnChip 2000 DIP Data Sheet
91-SR-002-42-8L