TSS901E_07 ATMEL Corporation, TSS901E_07 Datasheet - Page 2

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TSS901E_07

Manufacturer Part Number
TSS901E_07
Description
Triple Point to Point IEEE 1355 High Speed Controller
Manufacturer
ATMEL Corporation
Datasheet
Introduction
Interfaces
2
TSS901E
The TSS901E provides an interface between a Data-Strobe link according to the IEEE Std
1355-1995 specification carrying the simple interprocessor communication protocol
data processing node consisting of a CPU and communication and data memory. The TSS901E
provides HW supported execution of the major parts of the simple interprocessor communication
protocol, particularly:
However, with disabling of features such as the protocol handling or with reduction of the trans-
mit rate (TSS901E automatically reduces transmit rate for sending null tokens) also low power
usage is supported.
Figure 1. TSS901E Block Diagram
Target applications are heterogeneous multi-processor systems supported by scalable inter-
faces including the little/big endian swapping. The TSS901E connects modules with different
processors (e.g. TSC21020F, ERC32, TSC695E and others). Any kind of network topology
could be realized through the high speed point-to-point IEEE1355-links (see chapter
Applications).
The TSS901E consists of the following blocks (See Figure 1):
1.
transfer of data between two modes of a multi-processor system with minimal host CPU
intervention,
execution of simple commands to provide basic features for system control functions,
provision of fault tolerant features.
Rastetter P. et.al., Simple Interprocessor Communication Protocol Specification, DIPSAPII-DAS-
31-01, Issue 3, 08.10.96, also available on the same web site as the users guide.
RX1_DS
TX1_DS
RX2_DS
TX2_DS
RX3_DS
TX3_DS
macro
cell
DS
Channel 3
Transmit
Channel 2
Receive
Protocol
Channel 1
JTAG
COMI
HOCI
PRCI
4167F–AERO–06/07
CDATA
HDATA
Test
CADR
CCTRL
HADR
HCTRL
HINT
UTIL
RCPU
SES
(1)
and a

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