TS68020 ATMEL Corporation, TS68020 Datasheet - Page 19
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TS68020
Manufacturer Part Number
TS68020
Description
Hcmos 32-bit Virtual Memory Mpu, 16/20/25 MHZ
Manufacturer
ATMEL Corporation
Datasheet
1.TS68020.pdf
(45 pages)
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Figure 12. Drive Levels and Test Points for AC Specification
Legend:
A) Maximum Output Delay Specification
B) Minimum Output Hold Time
C) Minimum Input Setup Time Specification
D) Minimum Input Hold Time Specification
E) Signal Valid to Signal Valid Specification (Maximum or Minimum)
F) Signal Valid to Signal Invalid Specification (Maximum or Minimum)
Notes:
2115A–HIREL–07/02
1. This output timing is applicable to all parameters specified relative to the rising edge of the clock.
2. This out put timing is applicable to all parameters specified relative to the falling edge of the clock.
3. This input timing is applicable to all parameters specified relative to the falling edge of the clock.
4. This input timing is applicable to all parameters specified relative to the falling edge of the clock.
5. This timing is applicable to all parameters specified relative to the assertion/negation of another signal.
TS68020
19