PIC14000-04 Microchip Technology, PIC14000-04 Datasheet - Page 19

• Manufacturer Part Number: PIC14000-04
• Description: 28-Pin Programmable Mixed Signal Controller
• Manufacturer: Microchip Technology

4.2.2.3
The INTCON Register is a readable and writable
register which contains the various enable and flag bits
for the Timer0 overflow and peripheral interrupts.
Figure 4-5 shows the bits for the INTCON register.
FIGURE 4-5:
1996 Microchip Technology Inc.
bit7
GIE
R/W
INTCON REGISTER
PEIE
R/W
INTCON REGISTER
T0IE
R/W
R/W
r
R/W
r
T0IF
R/W
R/W
r
R/W
Preliminary
r
bit0
T0IF: TMR0 overflow interrupt flag
1 = The TMR0 has overflowed
0 = TMR0 did not overflow
T0IE: TMR0 interrupt enable bit
1 = Enables T0IF interrupt
0 = Disables T0IF interrupt
PEIE: Peripheral interrupt enable bit
1 = Enables all un-masked peripheral interrupts
0 = Disables all peripheral interrupts
GIE: Global interrupt enable
1 = Enables all un-masked interrupts
0 = Disables all interrupts
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Reserved. This bit should be programmed as ‘0’. Use of this bit
as a general purpose read/write bit is not recommended, since
this may affect upward compatibility with future products.
Register:
Address:
POR value: 0000 000xb
Must be cleared by software
Note:
0Bh or 8Bh
INTCON
The T0IF will be set by the specified
condition even if the corresponding Inter-
rupt Enable Bit is cleared (interrupt
disabled) or the GIE bit is cleared (all
interrupts
interrupt, clear the interrupt flag, to ensure
that the program does not immediately
branch to the peripheral interrupt service
routine
W:
R:
U:
disabled).
Writable
Readable
Unimplemented,
read as '0'
PIC14000
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DS40122B-page 19
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