ADC1175CIMTC National Semiconductor, ADC1175CIMTC Datasheet - Page 3

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ADC1175CIMTC

Manufacturer Part Number
ADC1175CIMTC
Description
8-Bit/ 20MHz/ 60mW A/D Converter
Manufacturer
National Semiconductor
Datasheets

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Pin Descriptions and Equivalent Circuits
11, 13
15, 18
20, 21
3 thru
2, 24
Pin
No.
14,
22
12
10
1
Symbol
D0-D7
DV
DV
AV
V
AV
CLK
OE
RBS
DD
DD
SS
SS
Equivalent Circuit
3
(Continued)
Reference Bottom Bias with internal pull down
resistor. Short to V
ladder.
CMOS/TTL compatible Digital input that, when low,
enables the digital outputs of the ADC1175. When
high, the outputs are in a high impedance state.
CMOS/TTL compatible digital clock Input. V
sampled on the falling edge of CLK input.
Conversion data digital Output pins. D0 is the LSB,
D7 is the MSB. Valid data is output just after the
rising edge of the CLK input. These pins are
enabled by bringing the OE pin low.
Positive digital supply pin. Connect to a clean, quiet
voltage source of +5V. AV
a common source and be separately bypassed with
a 10µF capacitor and a 0.1µF ceramic chip
capacitor. See Section 3.0 for more information.
The ground return for the digital supply. AV
DV
ADC1175.
Positive analog supply pin. Connected to a clean,
quiet voltage source of +5V. AV
have a common source and be separately bypassed
with a 10 µF capacitor and a 0.1 µF ceramic chip
capacitor. See Section 3.0 for more information.
The ground return for the analog supply. AV
DV
ADC1175 package.
SS
SS
should be connected together close to the
should be connected together close to the
RB
Description
to self bias the reference
DD
and DV
DD
and DV
DD
should have
www.national.com
DD
SS
IN
SS
should
is
and
and

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