MPC9608 Motorola Inc, MPC9608 Datasheet - Page 9

• Manufacturer Part Number: MPC9608
• Description: 1:10 LVCMOS Zero Delay Clock Buffer
• Manufacturer: Motorola Inc

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The time from the PLL controlled edge to the non controlled edge, di-
vided by the time between PLL controlled edges, expressed as a per-
centage.
The variation in cycle time of a signal between adjacent cycles, over a
random sample of adjacent cycle pairs.
TIMING SOLUTIONS
The pin-to-pin skew is defined as the worst case difference in propa-
gation delay between any similar delay path within a single device.
t
Figure 15. Output Transition Time Test Reference
F
Figure 9. Output-to-output Skew t
Figure 11. Output Duty Cycle (DC)
Figure 13. Cycle-to-cycle Jitter
T
N
t
P
T
N + 1
T
0
DC = t
t
R
t
SK(O)
T
P
JIT(CC)
V
Freescale Semiconductor, Inc.
/T
CC
0
For More Information On This Product,
0.55
x 100%
2.4
= 3.3 V
= |T
N
SK(O)
-T
V
V
GND
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CC
CC
V
V
GND
V
V
GND
N + 1
CC
CC
CC
CC
2
|
2
2
The deviation in t
random sample of cycles.
The deviation in cycle time of a signal with respect to the ideal period
over a random sample of cycles.
CLK_STOP
CCLK
Figure 16. Setup and Hold Time (t
Figure 10. Propagation delay (t
FB_IN
CCLK
FB_IN
CCLK
0
for a controlled edge with respect to a t
T
0
Figure 14. Period Jitter
t
Figure 12. I/O Jitter
( )
test reference
t
s
T
t
T
H
JIT( )
JIT(PER)
PD
, static phase offset)
s
, t
= |T
H
) Test Reference
= |T
0
- T
N
1
- 1/f
mean|
V
V
GND
V
V
GND
0
V
V
GND
V
V
GND
CC
CC
CC
CC
CC
CC
CC
CC
mean in a
MPC9608
0
|
2
2
2
2
9