MPC860 Motorola, MPC860 Datasheet - Page 23
MPC860
Manufacturer Part Number
MPC860
Description
Family Hardware Specifications
Manufacturer
Motorola
Datasheet
1.MPC860.pdf
(76 pages)
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Figure 9-6 provides the timing for the synchronous input signals.
Figure 9-7 provides normal case timing for input data. It also applies to normal read
accesses under the control of the UPM in the memory controller.
Figure 9-8 provides the timing for the input data controlled by the UPM for data beats
where DLT3 = 1 in the UPM RAM words. (This is only the case where data is latched on
the falling edge of CLKOUT.)
MOTOROLA
BB, BG, BR
RETRY, CR
CLKOUT
TEA, KR,
CLKOUT
D[0:31],
DP[0:3]
TA, BI
TA
Figure 9-6. Synchronous Input Signals Timing
Figure 9-7. Input Data Timing in Normal Case
MPC860 Family Hardware Specifications
B16
B18
B16a
B16b
B16
B17
B19
B17a
B17
B17
Bus Signal Timing
23